W989D6DB Datasheet, PDF (3/64 Pages) Winbond – Standard Self Refresh Mode

W989D6DB / W989D2DB
10.8 Extended Mode register Set (EMRS) Cycle ................................................................. 39
11. OPERATING TIMING EXAMPLE ............................................................................................. 40
11.1 Interleaved Bank Read (Burst Length = 4, CAS Latency = 3) ...................................... 40
11.2 Interleaved Bank Read (Burst Length = 4, CAS Latency = 3, Auto-precharge) ........... 41
11.3 Interleaved Bank Read (Burst Length = 8, CAS Latency = 3) ...................................... 42
11.4 Interleaved Bank Read (Burst Length = 8, CAS Latency = 3, Auto-precharge) ........... 43
11.5 Interleaved Bank Write (Burst Length = 8) ................................................................... 44
11.6 Interleaved Bank Write (Burst Length = 8, Auto-precharge) ........................................ 45
11.7 Page Mode Read (Burst Length = 4, CAS Latency = 3)............................................... 46
11.8 Page Mode Read / Write (Burst Length = 8, CAS Latency = 3) ................................... 47
11.9 Auto-precharge Read (Burst Length = 4, CAS Latency = 3) ........................................ 48
11.10 Auto-precharge Write (Burst Length = 4) .................................................................... 49
11.11 Auto Refresh Cycle ..................................................................................................... 50
11.12 Self Refresh Cycle....................................................................................................... 51
11.13 Burst Read and Single Write (Burst Length = 4, CAS Latency = 3)............................ 52
11.14 Power Down Mode ...................................................................................................... 53
11.15 Deep Power Down Mode Entry ................................................................................... 54
11.16 Deep Power Down Mode Exit ..................................................................................... 55
11.17 Auto-precharge Timing (Read Cycle).......................................................................... 56
11.18 Auto-precharge Timing (Write Cycle) .......................................................................... 57
11.19 Timing Chart of Read to Write Cycle........................................................................... 58
11.20 Timing Chart of Write to Read Cycle........................................................................... 58
11.21 Timing Chart of Burst Stop Cycle (Burst Stop Command) .......................................... 59
11.22 Timing Chart of Burst Stop Cycle (Precharge Command) .......................................... 59
11.23 CKE/DQM Input Timing (Write Cycle) ......................................................................... 60
11.24 CKE/DQM Input Timing (Read Cycle)......................................................................... 61
12. PACKAGE SPECIFICATION .................................................................................................... 62
12.1 LPSDR x16 ................................................................................................................... 62
12.2 LPSDR x32 ................................................................................................................... 63
13. REVISION HISTORY ................................................................................................................ 64
Publication Release Date: Mar. 19, 2014
-3-
Revision: A01-001