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W741C260 Datasheet, PDF (27/92 Pages) Winbond – 4-BIT MICROCONTROLLER
W741C260
Continued
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LCDR1C
LCDR1F−LCDR1D
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SEG31−SEG28
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SEG31
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SEG30
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SEG29
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SEG28
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The relationship between the LCD drive mode and the maximum number of drivable LCD segments
is shown below.
LCD DRIVE MODE
Static
1/2 Bias 1/2 Duty
1/2 Bias 1/3 Duty
1/3 Bias 1/3 Duty
1/3 Bias 1/4 Duty
MAX. NUMBER OF
DRIVABLE LCD SEGMENT
32 (COM1)
64 (COM1−COM2)
96 (COM1−COM3)
96 (COM1−COM3)
128 (COM1−COM4)
CONNECTION AT
POWER INPUT
Connect VDD3, VDD2 to VDD1
Connect VDD3 to VDD2
Connect VDD3 to VDD2
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LCD Output Mode Type Flag (LCDM)
The LCD output mode type flag is organized as an 8-bit binary register (LCDM.0 to LCDM.7). These
bits are used to control the LCD output pins architecture. When LCD output pins are set to DC output
mode by option codes, the architecture of these output pins (segment 0 to segment 31) can be
selected as CMOS or NMOS type. It is controlled by the MOV LCDM, #I instruction. The bit
descriptions are as follows:
765
432
1
0
LCDM w w w w w w
ww
Note: W means write only.
LCDM.0 = 0 SEG0 to SEG3 work as CMOS output type.
= 1 SEG0 to SEG3 work as NMOS output type.
LCDM.1 = 0 SEG4 to SEG7 work as CMOS output type.
= 1 SEG4 to SEG7 work as NMOS output type.
LCDM.2 = 0 SEG8 to SEG11 work as CMOS output type.
= 1 SEG8 to SEG11 work as NMOS output type.
LCDM.3 = 0 SEG12 to SEG15 work as CMOS output type.
= 1 SEG12 to SEG15 work as NMOS output type.
LCDM.4 = 0 SEG16 to SEG19 work as CMOS output type.
= 1 SEG16 to SEG19 work as NMOS output type.
LCDM.5 = 0 SEG20 to SEG23 work as CMOS output type.
= 1 SEG20 to SEG23 work as NMOS output type.
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Publication Release Date: March 1998
Revision A3