W741C260 Datasheet, PDF (16/92 Pages) Winbond – 4-BIT MICROCONTROLLER

W741C260
INT must be executed again. Otherwise, these interrupts can be disabled by executing DIS INT
instruction. The bit descriptions are as follows:
76543210
IEF w
w
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Note: W means write only.
IEF.0 = 1 Interrupt 0 is accepted by overflow from the Divider 0.
IEF.1 = 1 Interrupt 1 is accepted by underflow from the Timer 0.
IEF.2 = 1 Interrupt 2 is accepted by a signal change on port RC.
IEF.3 Reserved
IEF.4 = 1 Interrupt 0 is accepted by overflow from the Divider 1.
IEF.5 & IEF.6 are reserved.
IEF.7 = 1 Interrupt 7 is accepted by underflow from Timer 1.
Stop Mode Operation
In stop mode, all operations of the µC cease (excluding the operation of sub-oscillator and divider 1
when the dual-clock operation mode is selected). The µC enters stop mode when the STOP
instruction is executed and exits stop mode when an external trigger is activated (by a falling signal
on the RC port). When the designated signal is accepted, the µC awakens and executes the next
instruction (if the corresponding bits of IEF and PEF have been set, It will enter the interrupt service
routine after stop mode released). To prevent erroneous execution, the NOP instruction should follow
the STOP command.
Stop Mode Wake-up Enable Flag for Port RC (SEF)
The stop mode wake-up flag for port RC is organized as a 4-bit binary register (SEF.0 to SEF.3).
Before port RC may be used to make the device exit the stop mode, the content of the SEF must be
set first. The SEF is controlled by the MOV SEF, #I instruction. The bit descriptions are as follows:
3210
SEF w w w w
Note: W means write only.
SEF 0 = 1 Device will exit stop mode when falling edge signal is applied to pin RC.0.
SEF 1 = 1 Device will exit stop mode when falling edge signal is applied to pin RC.1.
SEF 2 = 1 Device will exit stop mode when falling edge signal is applied to pin RC.2.
SEF 3 = 1 Device will exit stop mode when falling edge signal is applied to pin RC.3.
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