W78ERD2 Datasheet, PDF (23/72 Pages) Winbond – 8-BIT MICROCONTROLLER

W78ERD2
Port 4 Control Register A
Bit:
7
6
5
4
3
2
1
0
P41FUN1 P41FUN0 P41CMP1 P41CMP0 P40FUN1 P40FUN0 P40CMP1 P40CMP0
Mnemonic: P4CONA Address: C2h
BIT
NAME
FUNCTION
7, 6
P41FUN1 _{The P4.1 function control bits which are the similar definition as P43FUN1,}
P41FUN0 ^P43FUN0.
5, 4
P41CMP1 _{The P4.1 address comparator length control bits which are the similar}
P41CMP0 ^{definition as P43CMP1, P43CMP0.}
3, 2
P40FUN1 _{The P4.0 function control bits which are the similar definition as P43FUN1,}
P40FUN0 ^P43FUN0.
1, 0
P40CMP1 _{The P4.0 address comparator length control bits which are the similar}
P40CMP0 ^{definition as P43CMP1, P43CMP0.}
Port 4 Control Register B
Bit:
7
6
5
4
3
2
1
0
P43FUN1 P43FUN0 P43CMP1 P43CMP0 P42FUN1 P42FUN0 P42CMP1 P42CMP0
Mnemonic: P4CONB Address: C3h
BIT
NAME
FUNCTION
7, 6 P43FUN1 00: Mode 0. P4.3 is a general purpose I/O port which is the same as Port1.
P43FUN0 01: Mode 1. P4.3 is a Read Strobe signal for chip select purpose. The
address range depends on the SFR P43AH, P43AL, P43CMP1 and
P43CMP0.
10: Mode 2. P4.3 is a Write Strobe signal for chip select purpose. The
address range depends on the SFR P43AH, P43AL, P43CMP1 and
P43CMP0.
11: Mode 3. P4.3 is a Read/Write Strobe signal for chip select purpose. The
address range depends on the SFR P43AH, P43AL, P43CMP1, and
P43CMP0.
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Publication Release Date: April 20, 2005
Revision A4