W78ERD2 Datasheet, PDF (18/72 Pages) Winbond – 8-BIT MICROCONTROLLER

W78ERD2
Watchdog Timer Reset Register
Bit:
7
6
5
4
3
2
1
0
WDTRS WDTRS WDTRS WDTRS WDTRS WDTRS WDTRS WDTRS
T.7
T.6
T.5
T.4
T.3
T.2
T.1
T.0
Mnemonic: WDTRST Address: A6h
Interrupt Enable
Bit:
7
6
EA
EC
Mnemonic: IE
5
4
3
ET2
ES
ET1
Address: A8h
2
1
0
EX1 ET0 EX0
BIT NAME
FUNCTION
7
EA Global enable. Enable/disable all interrupts except for PFI.
6
EC Enable PCA interrupt.
5
ET2 Enable Timer 2 interrupt.
4
ES Enable Serial Port 0 interrupt.
3
ET1 Enable Timer 1 interrupt.
2
EX1 Enable external interrupt 1.
1
ET0 Enable Timer 0 interrupt.
0
EX0 Enable external interrupt 0.
SLAVE ADDRESS
Bit:
7
6
5
4
3
2
1
0
Mnemonic: SADDR
Address: A9h
BIT NAME
FUNCTION
7
SADDR
The SADDR should be programmed to the given or broadcast address for serial
port 0 to which the slave processor is designated.
Port 4.2 Low Address Comparator
Bit:
7
6
5
4
3
2
1
0
P42AL.7 P42AL.6 P42AL.5 P42AL.4 P42AL.3 P42AL.2 P42AL.1 P42AL.0
Mnemonic: P42AL
Address: ACh
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