W949D6DB Datasheet, PDF (17/60 Pages) Winbond – Standard Self Refresh Mode

W949D6DB / W949D2DB
7.4.1 Extended Mode Register Definition
BA1 BA0
An...A8 (see Note 1)
A7 ~ A5
A4 A3 A2 A1 A0
Address Bus
1
0
0 (see Note 2)
DS
Reserved
PASR
Extended Mode Register
A7 A6 A5
0
0
0
Drive Strength
Full Strength Driver
A2 A1 A0
0
0
0
0
0
1
Half Strength Driver
0
1
0
Quarter Strength Driver
0
1
1
Octant Strength Driver
1
0
0 Three-Quarters Strength Driver
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
NOTES:
1.MSB depends on mobile DDR SDRAM density.
2.A logic 0 should be programmed to all unused / undefined bits to ensure future compatibility.
PASR
All banks
1/2 array (BA1=0)
1/4 array (BA1=BA0=0)
Reserved
Reserved
Reserved
Reserved
Reserved
7.4.2 Partial Array Self Refresh
With partial array self refresh (PASR), the self refresh may be restricted to a variable portion of the total
array. The whole array (default), 1/2 array, or 1/4 array could be selected. Data outside the defined area
will be lost. Address bits A0 to A2 are used to set PASR.
7.4.3 Automatic Temperature Compensated Self Refresh
The device has an Automatic Temperature Compensated Self Refresh feature. It automatically adjusts
the refresh rate based on the device temperature without any register update needed.
7.4.4 Output Drive Strength
The drive strength could be set to full, half, quarter, octant, and three-quarter strength via address bits
A5, A6 and A7. The half drive strength option is intended for lighter loads or point-to-point environments.
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Publication Release Date: Oct. 08, 2014
Revision: A01-003