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W19B320ATB Datasheet, PDF (15/53 Pages) Winbond – 4M × 8/2M × 16 BITS 3V FLEXIBLE BANK FLASH MEMORY
W19B320AT/B
sectors. The time between these additional cycles must be less than 50 μs; otherwise, erasure may
begin. Any sector erase address and command following the exceeded time-out may or may not be
accepted. To ensure all commands are accepted, processor interrupts be disabled during this time is
recommended. The interrupts can be re-enabled after the last Sector Erase command is written. Any
command other than Sector Erase or Erase Suspend during the time-out period resets the bank to the
read mode. The system must rewrite the command sequence and any additional addresses and
commands.
The system can monitor DQ3 to determine whether or not the sector erase timer has timed out (See
the section on DQ3: Sector Erase Timer.). The time-out begins from the rising edge of the final #WE
pulse in the command sequence.
As the Embedded Erase algorithm is complete, the bank returns to reading array data and addresses
are no longer latched. Please note that when the Embedded Erase operation is in progress, the
system can read data from the non-erasing bank at the same time. By reading DQ7, DQ6, DQ2, or
RY/#BY in the erasing bank, the system can determine the status of the erase operation. Please refer
to the Write Operation Status section for information on these status bits.
When the sector erase operation begins, only the Erase Suspend command is valid. All other
commands are ignored. However, a hardware reset shall terminate the erase operation immediately. If
this occurs, to ensure data integrity, the sector erase command sequence should be reinitiated once
the bank has returned to reading array data.
6.2.8 Erase Suspend/Erase Resume Commands
The Erase Suspend command, B0h, allows the system to interrupt a sector erase operation and then
read data from, or program data to, any sector not selected for erasure. When writing this command,
the bank address is required. This command is valid only during the sector erase operation, which
includes the 50 μs time-out period during the sector erase command sequence. If written during the
chip erase operation or Embedded Program algorithm, the Erase Suspend command is ignored.
As the Erase Suspend command is written during the sector erase operation, a maximum of 20 μs is
required to suspend the erase operation. However, while the Erase Suspend command is written
during the sector erase time-out, the device shall terminate the time-out period and suspends the
erase operation immediately.
The bank enters into an erase-suspend-read mode after the erase operation has been suspended.
The system can read data from, or program data to, any sector not selected for erasure. (In device
“erase suspends” all sectors are selected for erasure.) The “reading at any address within erase-
suspended sectors produces status” information is on DQ0-DQ7. The system can use DQ7, or DQ6
and DQ2 together, to determine whether a sector is actively erasing or is erase-suspended. Please
refer to the Write Operation Status section for detail information on these status bits.
After an erase-suspended program operation is complete, the bank returns to the erase-suspend-read
mode. Using the DQ7 or DQ6 status bits, the system can determine the status of the program operation,
just as in the standard Byte Program operation. Please refer to the Write Operation Status section for more
information.
In the erase-suspend-read mode, the AUTOSELECT command sequence also can be issued. Please refer
to the AUTOSELECT Mode and AUTOSELECT Command Sequence sections for details.
The Erase Resume command must be written to resume the sector erase operation. When writing this
command, the bank address of the erase-suspended bank is required. Further writes of the Resume
command are ignored. After the chip has resumed erasing, another Erase Suspend command can be
written.
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Publication Release Date: December 27, 2005
Revision A4