TC9446FG Datasheet, PDF (9/41 Pages) Toshiba Semiconductor – Audio Digital Processor for Decode of Dolby Digital (AC-3), MPEG2 Audio

Reset of Hardware
(or reset of software by command)
MICS = “L”
Checking of MIACK = “L”
(waiting for becoming to MIACK = “L” at the MIACK = “H”)
Write of the 24 bit command
(program boot = 000060h)
Write of program data
(higher rank 20 bit at address 0000h)
Write of program data
(low rank 20 bit at address 0000h)
Write of program data
(higher rank 20 bit at address 0007h)
Write of program data
(low rank 20 bit at address 0007h)
MICS = “H”
TC9446FG
Setting “H” for bit of program boot
and soft reset bit.
Program data is 20 bit lower assign.
It is possible to do the program boot for address
of 007Fh maximum.
It finished the program boot.
MICS = “L”
Checking of MIACK = “L”
(waiting for becoming to MIACK = “L” at the MIACK = “H”)
Write of the 24 bit command
(soft reset off = 000000h)
MICS = “H”
Program starting
Figure 2 Procedure of Program Boot and Program Start
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2005-09-28