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TC9446FG Datasheet, PDF (12/41 Pages) Toshiba Semiconductor – Audio Digital Processor for Decode of Dolby Digital (AC-3), MPEG2 Audio | |||
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TC9446FG
4) ON/OFF of soft reset
The case where a program is started after program boot, and in restarting a program, it performs
ON/OFF of soft reset.
ON/OFF of soft reset are performed by carrying out and transmitting the bit of the soft reset in a 24
bit command to âHâ (ON) and âLâ (OFF).
Since data with which ON/OFF of soft reset follow a command is not required, it is made into
MICS = âHâ after 24 bit command transmission.
In addition, in order to return from a incorrect operation state, when turning ON soft reset, a 24 bit
command can be transmitted irrespective of the state of MIACK signal.
The procedure of ON/OFF of soft reset is shown in Figure 5.
MICS = âLâ
Checking of MIACK = âLâ
(waiting for becoming to MIACK = âLâ at the MIACK = âHâ)
Transmission of 24 bit command
(soft reset ON/OFF = 0000x0h)
It is possible to transmit the command
data of soft reset ON at MIACK = âHâ.
Soft reset ON: Bit = â1â.
Soft reset OFF: Bit = â0â.
MICS = âHâ
Soft reset ON/OFF
Figure 5 Procedure of ON/OFF of Soft Reset
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2005-09-28
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