TC9446FG Datasheet, PDF (8/41 Pages) Toshiba Semiconductor – Audio Digital Processor for Decode of Dolby Digital (AC-3), MPEG2 Audio

2. Data Transmission Format
TC9446FG
2-1. Serial Mode Setting
2-1-1. Data Transmission Format in the Serial Mode
A data transmission format in the serial mode is shown in Figure 1.
After the data transmission at the time of the serial mode sets MICS signal to “L”, fundamentally, it checks that MIACK signal is “L” and transmits a 24 bit
command at MSB first.
However, it cannot transmit at the time of MIACK signal = “H”.
Then, the word set up by the 24 bit command which the Read or Write (R/W) of 24 bit data of a number (1-16 word) is performed, and, finally, MICS signal is
set to “H”.
However, since there is a term when MIACK signal after transmission is set to “H” in a 24 bit command, at the time of Read, command transmission back also
needs to check that MIACK signal is set to “L”.
MICS
MIACK
MILP
MICK
MIDIO
COMMAND (24 bit)
Transmission data (1 to 16 words)
DATA-1 (24 bit)
DATA-16 (24 bit)
Figure 1 Serial Mode Data Transmission Format
2-1-2. Data Transmission Method in the Serial Transmission Mode
1) Program boot and a program start
As for TC9446FG, RAM is assigned 128 words of program address 0000h-007Fh, and the interruption vector address is become 0000h-0009h.
Therefore, in order to operate TC9446FG, it needs to interrupt and a program needs to be booted to a vector address. In addition, a program load needs to be
continuously performed to an interruption vector address to store a program in 000Ah-007Fh.
In order to perform program boot, the program RAM boot start bit and the soft reset bit in the 24 bit command transmitted after reset need to be set to “H”.
(command = 000060h) And, after command transmission, program data (40 bit) is divided into 20 bit of a higher rank/low rank, and it transmits by the low-rank
stuffing of 24 bit data in the order of a higher rank (20 bit) and a low rank (20 bit).
Since a write-in address is made automatic (+1) from 0000h, if it transmits the required number of words and MICS is set to “H”, program boot will complete
it.
In addition, the write-in address of program boot always starts from 0000h.
A start of a program carries out and transmits the soft reset bit in a 24 bit command to “L”, and is performed by setting MICS to “H”, without performing
data transmission.
The procedure of program boot and a program start is shown in Figure 2.
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2005-09-28