TC9446FG Datasheet, PDF (17/41 Pages) Toshiba Semiconductor – Audio Digital Processor for Decode of Dolby Digital (AC-3), MPEG2 Audio

Reset of hardware
(or reset of software by command)
START Condition
Transmission of I²C Address (3Ah)
TC9446FG
At the time of ACK = “H”, it resumes from
START Condition.
Checking of ACK bit = “L”
Write of 24 bit command
(program boot = 000060h)
Write of program data
(higher rank 20 bit at address 0000h)
Write of program data
(low rank 20 bit at address 0000h)
Write of program data
(higher rank 20 bit at address 0007h)
Write of program data
(low rank 20 bit at address 0007h)
START Condition
The bit of program boot and soft reset is
set to “H”.
Program data is 20 bits of low-rank
stuffing.
Boot is possible to the address of a
maximum of 007Fh.
The completion of program boot.
STOP Condition
Transmission of I²C Address (3Ah)
At the time of ACK = “H”, it resumes from
START Condition.
Checking of ACK bit = “L”
Write of 24 bit command
(soft reset OFF = 000000h)
STOP Condition
Program starting
Figure 11 Procedure of Program Boot and Program Start
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2005-09-28