TC9446FG Datasheet, PDF (24/41 Pages) Toshiba Semiconductor – Audio Digital Processor for Decode of Dolby Digital (AC-3), MPEG2 Audio

TC9446FG
5) Non-inputted detection
When existence of the edge of the input signal from RX terminal is detected and there is no fixed
time edge, VCO oscillation operates by free run. Since VCO oscillation frequency and CKO terminal
output are set to about 80 MHz, please change it to an external clock automatically by the internal
program at the time of less inputting, or choose XI input by setup of command register.
Table 4 Non-Inputted Judgment Time of Input Signal
Sampling Frequency (kHz)
32
44.1
48
96
Time of Last Edge (ms)
approx. 1000
approx. 750
approx. 700
approx. 350
6) Miss lock detection
By comparing the input signal and the oscillation frequency from RX terminal, a Miss lock is
detected and the signal for escaping from a miss lock is outputted from FCONT terminal.
Higher than objective frequency
V_DD
FCONT Output
V_SS
Objective frequency
Hiz
Lower than objective frequency
Figure 19 Miss Lock Detection Operation Timing
6. DSP Part Clock Generating Circuit
It is the circuit which generates a clock required in order to operate a decode program. DLL circuit can
generate the DLL clock of a crystal oscillation clock.
DLL circuit and a crystal oscillation circuit block are shown in Figure 20.
(A) CKI/XI selector
XI
99
DLL oscillator
(*3, *4, *6)
Selector
Internal DSP clock
98
XO
96
SCKI
94
SCKO
93
DLCKS
V_SSX
External clock input
(when the SCKI does not use,
it connect to V_SS line.)
Clock output
92
DLON
V_SS
91
LPFO
V_SS
Figure 20 Crystal Oscillation Circuit and DLL Circuit Block
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2005-09-28