TH50VSF3680 Datasheet, PDF (53/55 Pages) Toshiba Semiconductor – SRAM AND FLASH MEMORY MIXED MULTI-CHIP PACKAGE

DQ7 (DATA Polling)
Start
Read Byte (DQ0~DQ7)
Addr. = VA
Yes
DQ7 = Data?
No
No
DQ5 = 1?
Yes
1)
Read Byte (DQ0~DQ7)
Addr. = VA
Yes
DQ7 = Data?
No
Fail
DQ6 (Toggle bit)
Start
Read Byte (DQ0~DQ7)
Addr. = VA
No
DQ6 = Toggle?
Yes
No
DQ5 = 1?
Yes
1)
Read Byte (DQ0~DQ7)
Addr. = VA
No
DQ6 = Toggle?
Yes
Fail
TH50VSF3680/3681AASB
1) :
DQ7 must be rechecked even if DQ5 = 1
because DQ7 may change at the same time
as DQ5.
Pass
1) :
DQ6 must be rechecked even if DQ5 = 1
because DQ6 may stop toggling at the same
time that DQ5 changes to 1.
Pass
VA: Byte address for programming.
Any of the addresses within the block being erased during a Block Erase operation.
Don’t care during a Chip Erase operation.
Any address not within the current block during an Erase Suspend operation.
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