TH50VSF3680 Datasheet, PDF (25/55 Pages) Toshiba Semiconductor – SRAM AND FLASH MEMORY MIXED MULTI-CHIP PACKAGE

ID Read Mode
TH50VSF3680/3681AASB
ID Read mode is used to read the device maker code and device code. The mode is useful for EPROM
programmers to automatically identify the device type.
In this method, simultaneous operation can be performed. Inputting an ID Read command sets the specified
bank to ID Read mode. Banks are specified by inputting the bank address (BK) in the third bus write cycle of the
command cycle. To read an ID code, the bank address as well as the ID read address must be specified. From
address BK + 00 the maker code is output; from address BK + 01 the device code is output. From other banks,
data are output from the memory cells. Inputting a Reset command releases ID Read mode and returns the
device to Read mode.
Access time in ID Read mode is the same as that in Read mode. For the codes, see the ID Code Table.
Standby Mode
There are two methods of entering Standby mode.
(1) Control using CEF and RESET
When the device is in Read mode, input VDD ± 0.3 V to CEF and RESET . The device enters Standby
mode and the current becomes standby current (ICCS1). However, if the device is in simultaneous operation,
the device does not enter Standby mode but causes the operating current to flow.
(2) Control using only RESET
When the device is in Read mode, input VSS ± 0.3 V to RESET . The device enters Standby mode and the
current becomes standby current (ICCS1). Even if the device is in simultaneous operation, this method can
terminate the current operation and set the device to Standby mode. This is a hardware reset, described
later.
In standby mode, DQ is put in high-impedance state.
Auto Sleep Mode
Function which suppresses power dissipation during read. When address input does not change for 150 ns or
longer, the device automatically enters Sleep mode and the current becomes standby current (ICCS1). However, if
the device is in simultaneous operation, the device does not enter Standby mode but causes the operating current
to flow. Because the output data are latched, data are output in Sleep mode. When the address is changed, Sleep
mode is automatically released, outputting data from the changed address.
Output Disable Mode
Inputting VIH to OE disables output from the device, setting DQ to high-impedance.
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