TH50VSF3680 Datasheet, PDF (32/55 Pages) Toshiba Semiconductor – SRAM AND FLASH MEMORY MIXED MULTI-CHIP PACKAGE

Common Flash Memory Interface (CFI)
TH50VSF3680/3681AASB
The TH50VSF3680/3681AASB conforms to the CFI. Information on device specifications and characteristics
can be obtained via CFI. To read information from the device, input the Query command followed by the address.
In Word mode, DQ8 to DQ15 all output 0s. To exit this mode, input the Reset command.
CFI Code Table
ADDRESS A6~A0
10H
11H
12H
13H
14H
15H
16H
17H
18H
19H
1AH
1BH
1CH
1DH
1EH
1FH
20H
21H
22H
23H
24H
25H
26H
27H
28H
29H
2AH
2BH
DATA DQ15~DQ0
0051H
0052H
0059H
0002H
0000H
0040H
0000H
0000H
0000H
0000H
0000H
0027H
0036H
0000H
0000H
0004H
0000H
000AH
0000H
0005H
0000H
0004H
0000H
0017H
0002H
0000H
0000H
0000H
DESCRIPTION
Query Unique ASCII string “QRY”
Primary OEM Command Set
2: AMD/FJ standard type
Address for Primary Extended Table
Alternate OEM Command Set
0: none exists
Address for Alternate OEM Extended Table
V_DD Min (write/erase)
DQ7~DQ4: 1 V
DQ3~DQ0: 100 mV
V_DD Max (write/erase)
DQ7~DQ4: 1 V
DQ3~DQ0: 100 mV
V_PP Min voltage
V_PP Max voltage
Typical timeout per single byte/word write (2^N µs)
Typical timeout for Min size buffer write (2^N µs)
Typical timeout per individual block erase (2^N ms)
Typical timeout for full chip erase (2^N ms)
Max timeout for byte/word write (2^N times typical)
Max timeout for buffer write (2^N times typical)
Max timeout per individual block erase (2^N times typical)
Max timeout for full chip erase (2^N times typical)
Device Size (2^N byte)
Flash Device Interface description
2: ×8/×16
Max number of byte in multi-byte write (2^N)
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