TMPR4938 Datasheet, PDF (487/716 Pages) Toshiba Semiconductor – 64-Bit TX System RISC TX49 Family

Chapter 15 Interrupt Controller
Bit Mnemonic Field Name
Explanation
2:0
IL6
Interrupt level 6 Interrupt Level of INT [6] (Default: 000)
These bits specify the interrupt level of external INT[4] / ETHERC0.
000: Interrupt level 0 (Interrupt disabled)
001: Interrupt level 1
010: Interrupt level 2
011: Interrupt level 3
100: Interrupt level 4
101: Interrupt level 5
110: Interrupt level 6
111: Interrupt level 7
Figure 15.4.7 Interrupt Level Register 3 (2/2)
Read/Write
R/W
15-23