TA1316AN Datasheet, PDF (34/115 Pages) Toshiba Semiconductor – YCbCr/YPbPr Signal and Sync Processor for Digital TV, Progressive Scan TV and Double Scan TV

TA1316AN
Note 3:
Power supply sequence
At power-on, power should be supplied to the IC’s power supply pins according to the following sequence:
first to pin 29 (I²L V_DD), then to pin 19 (DEF/DAC V_CC), and finally to pin 40/pin 55 (RGB V_CC/YC V_CC).
Power to pin 29 should be supplied from pin 19 via zener diode through resister.
If power is not supplied to all the power pins or if power is not supplied in the above sequence, BUS preset
will be unsettled and the IC may not function properly.
Especially, when the frequency of H-out (pin 26) will be unsettled, H deflection output transistor may be
broken.
When this IC will be used on CRT, the frequency of H-out should be controlled by pin 22.
V
DEF/DAC V_CC
H-out output 5.2 V (typ.)
Power-on reset (POR) threshold voltage
for bus operation 3.3 V (typ.)
Logic operation 1.5 V (typ.)
I²L V_DD
t
Figure (Note 3) Timing from immediately after power-on to time
at which H-out is output (at Ta = 25°C)
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2002-10-04