TA1316AN Datasheet, PDF (32/115 Pages) Toshiba Semiconductor – YCbCr/YPbPr Signal and Sync Processor for Digital TV, Progressive Scan TV and Double Scan TV

Data Transmit Format 1
TA1316AN
S Slave address
7 bits
MSB
S: Start condition
0A
Sub address
8 bits
MSB
A: Acknowledge
A Transmit data
9 bits
MSB
AP
P: Stop condition
Data Transmit Format 2
S Slave address 0 A Sub address A Transmit data A ŋŋŋŋŋŋç
ŋŋŋŋŋŋ
Sub address A Transmit data n A P
Data Receive Format
S Slave address 1 A Transmit data 1 A Transmit data 2 A P
7 bits
8 bits
MSB
MSB
At the moment of the first acknowledge, the master transmitter becomes a master receiver and a slave
transmitter.
The Stop condition is generated by the master.
Details are provided in the Philips I²C specifications.
Optional Data Transmit Format: Automatic Increment Mode
S Slave address
7 bits
MSB
0A1
Sub address
7 bits
MSB
A Transmit data 1
8 bits
MSB
ŋŋŋŋ Transmit data 2
8 bits
MSB
AP
In this transmission method, data is set on automatically incremented sub-address from the specified
sub-address.
Purchase of TOSHIBA I²C components conveys a license under the Philips I²C Patent Rights to use these
components in an I²C system, provided that the system conforms to the I²C Standard Specification as defined by
Philips.
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2002-10-04