TA1316AN Datasheet, PDF (105/115 Pages) Toshiba Semiconductor – YCbCr/YPbPr Signal and Sync Processor for Digital TV, Progressive Scan TV and Double Scan TV

TA1316AN
Note
No.
Parameter
Test Method
HA09 Black peak detection (1) Set sub-address (00) data to 40H.
pulse phase and level
(2) Set SW24A to open.
(3) Input signal c (as shown in figure below) to pin 24 (FBP IN).
(4) Determine pin 18 (SCP OUT) black peak detection pulse phase HBP_S0a and HBP_S0b in
relation to signal c.
(5) Determine output level HBP_SV0 from pin 18 (SCP OUT) output waveform.
(6) Set sub-address (02) data to 90H.
(7) Measure as in steps (4) and (5), and determine phases HBP_S1a and HBP_S1b, and output level
HBP_SV1.
(8) Change sub-address (00) data to C0H and sub-address (02) data to 80H, and determine
phases HBP_S45a and HBP_S45b, and output level HBP_SV45.
Signal c
HBP_S0a/S1a/S45a
31.5 µs
4.13 µs
2V
0V
HBP_S0b/S1b/S45b
HA10 FBP threshold
Pin 18 waveform
HBP_SV0/SV1/SV45
(1) Set sub-address (00) data to 40H.
(2) Input signal b (as shown in figure below) to TP16.
(3) Increase amplitude of FBP signal input to pin 24 (FBP IN) from 0 V_P-P. When signal b and pin
26 (H-OUT) phases are locked, measure pin 24 input amplitude (V_thFBP).
31.75 µs
2.35 µs
1.5 V
105
2002-10-04