TA1316AN Datasheet, PDF (102/115 Pages) Toshiba Semiconductor – YCbCr/YPbPr Signal and Sync Processor for Digital TV, Progressive Scan TV and Double Scan TV

Note
No.
Parameter
HA03 Polarity detection
range
TA1316AN
Test Method
(1) Set sub-address (00) data to 40H.
(2) Input signal b (as shown in figure below) to TP16.
(3) Decrease signal b duty from 10% (to shorter negative polarity period) and determine signal b
duty (HD_DUTY1) when pin 16 input signal phase no longer locks with that of pin 26 (H-OUT).
(4) Increase signal b duty from 10% (to longer negative polarity period) and determine signal b
duty (HD_DUTY2) when pin 24 (FBP IN) phase changes in relation to signal b.
(5) Further increase signal b duty (to longer negative polarity period) and determine signal b duty
(HD_DUTY3) when pin 16 input signal phase no longer locks with that of pin 26 (H-OUT).
(6) Decrease signal b duty from 90% (to shorter negative polarity period) and determine signal b
duty (HD_DUTY4) when pin 24 (FBP IN) phase changes in relation to signal b.
31.75 µs
Signal b
A
1.5 V
B
HA04 Sync input threshold
amplitude
Duty = A/B × 100% (0%~100%)
(1) Set sub-address (00) to 82H and TEST mode to 01.
(2) Apply external voltage via 20 kΩ to pin 14.
(3) Set external voltage to 0 V and monitor pin 14 pin voltage SYNC_TIP_00.
Also check that pin 28 pin voltage is L.
(4) By increasing external voltage SYNC_OFF_00, monitor pin 14 SYNC IN pin voltage when pin
28 DAC1 pin voltage becomes H.
(5) Determine SYNC input level at SYNC separation level 00 as follows:
V_ths00 = (SYNC_OFF_00 − SYNC_TIP_00) /0.286 × 100
(6) Set SYNC separation level from 01 to 10 to 11, and determine V_ths01, V_ths10 and V_ths11.
V_ths01 = (SYNC_OFF_01 − SYNC_TIP_01) /0.286 × 100
V_ths10 = (SYNC_OFF_10 − SYNC_TIP_10) /0.286 × 100
V_ths11 = (SYNC_OFF_11 − SYNC_TIP_11) /0.286 × 100
1H
Pin 14
40 IRE
(= 286
mV_p-p)
Pin 28
(SYNC output Mode)
0.08H
Sync Sepa level
Sync Tip level
102
2002-10-04