TMP19A71CYFG Datasheet, PDF (102/402 Pages) Toshiba Semiconductor – 32-Bit RISC Microprocessor

TMP19A71
Port 2 Register
7
6
5
4
3
2
1
P2D
Bit Symbol
―
―
―
P2D4
P2D3
P2D2
P2D1
(0xFFFF_C080) Read/Write
R/W
Reset Value
0
0
0
0
0
0
0
Function
Port 2 output data (Output latch)
Note: When P2IER=0, the port state can be read from this register.
0
P2D0
0
7
P2CR
Bit Symbol
―
(0xFFFF_C084) Read/Write
Reset Value
0
Function
7
P2IER
Bit Symbol
―
(0xFFFF_C088) Read/Write
Reset Value
0
Function
Port 2 Control Register
6
5
4
3
2
1
0
―
―
P2CR4 P2CR3 P2CR2 P2CR1 P2CR0
R/W
0
0
0
0
0
0
0
0: Output disabled 1: Output enabled
Port 2 Input Enable Register
6
5
4
3
2
1
―
―
P2IER4 P2IER3 P2IER2 P2IER1
R/W
0
0
1
1
1
1
0: Input enabled 1: Input disabled
0
P2IER0
1
Port 2 Drive Strength Register
7
6
5
4
3
2
1
0
P2DSSR
Bit Symbol
―
―
―
P2DSSR4 P2DSSR3 P2DSSR2 P2DSSR1 P2DSSR0
(0xFFFF_C08C) Read/Write
R/W
Reset Value
0
0
0
0
0
0
0
0
Function
0: Low drive capability 1: High drive capability
Note: The current flowing through ports should not exceed the maximum ratings for each port pin and for
all the port pins.
Port 2 Pull-Up Control Register
7
6
5
4
3
2
1
0
P2PUCR
Bit Symbol
―
―
―
P2PUCR4 P2PUCR3 P2PUCR2 P2PUCR1 P2PUCR0
(0xFFFF_C094) Read/Write
R/W
Reset Value
0
0
0
0
0
0
0
0
Function
0: Pull-up disabled 1: Pull-up enabled
Note: In DSU (EJTAG) mode, Port 2 pins function as DSU control pins and the P2D, P2CR, P2IER, P2DDSR
and P2PUCR are invalid.
TMP19A71 8-6