LMK00308 Datasheet, PDF (9/25 Pages) Texas Instruments – 3-GHz 8-Output Differential Clock Buffer/Level Translator

Symbol
Parameter
Conditions
Min Typ Max
HCSL Outputs (CLKoutAn/CLKoutAn*, CLKoutBn/CLKoutBn*)
f_CLKout
Output Frequency Range
(Note 20)
R_L = 50 Ω to GND, C_L ≤ 5 pF
DC
400
Jitter_ADD
Additive RMS Jitter
Integration Bandwidth
1 MHz to 20 MHz
(Note 16)
Vcco = 3.3 V,
R_T = 50 Ω to GND
CLKin: 100 MHz, Slew
rate ≥ 3 V/ns
CLKin: 156.25 MHz,
Slew rate ≥ 2.7 V/ns
77
86
Noise Floor
Noise Floor
f_OFFSET ≥ 10 MHz
Vcco = 3.3 V,
R_T = 50 Ω to GND
CLKin: 100 MHz, Slew
rate ≥ 3 V/ns
CLKin: 156.25 MHz,
Slew rate ≥ 2.7 V/ns
-161.3
-156.3
DUTY
Duty Cycle (Note 20)
50% input clock duty cycle
45
55
V_OH
V_OL
V_CROSS
ΔV_CROSS
Output High Voltage
Output Low Voltage
Absolute Crossing Voltage
(Note 20, Note 22)
Total Variation of V_CROSS
(Note 20, Note 22)
T_A = 25 °C, DC Measurement,
R_T = 50 Ω to GND
R_L = 50 Ω to GND,
C_L ≤ 5 pF
520
810
920
-150
0.5
150
160
350
460
140
t_R
Output Rise Time
20% to 80% (Note 22)
250 MHz, R_L = 50 Ω to GND,
300
t_F
Output Fall Time
80% to 20% (Note 22)
C_L ≤ 5 pF
300
LVCMOS Output (REFout)
f_CLKout
Output Frequency Range
(Note 20)
C_L ≤ 5 pF
DC
250
Additive RMS Jitter
Jitter_ADD
Integration Bandwidth
1 MHz to 20 MHz
Vcco = 3.3 V,
C_L ≤ 5 pF
100 MHz, Input Slew
rate ≥ 3 V/ns
95
(Note 16)
Noise Floor
DUTY
Noise Floor
f_OFFSET ≥ 10 MHz
Duty Cycle (Note 20)
Vcco = 3.3 V,
C_L ≤ 5 pF
100 MHz, Input Slew
rate ≥ 3 V/ns
-159.3
50% input clock duty cycle
45
55
V_OH
Output High Voltage
1 mA load
Vcco -
0.1
V_OL
Output Low Voltage
I_OH
Output High Current (Source)
Vo = Vcco / 2
I_OL
Output Low Current (Sink)
Vcco = 3.3 V
Vcco = 2.5 V
Vcco = 3.3 V
Vcco = 2.5 V
0.1
28
20
28
20
t_R
Output Rise Time
20% to 80% (Note 22)
250 MHz, R_L = 50 Ω to GND,
225
t_F
Output Fall Time
80% to 20% (Note 22)
C_L ≤ 5 pF
225
t_EN
Output Enable Time (Note 23)
t_DIS
Output Disable Time (Note 23)
C_L ≤ 5 pF
3
3
Units
MHz
fs
dBc/Hz
%
mV
mV
mV
mV
ps
ps
MHz
fs
dBc/Hz
%
V
V
mA
mA
ps
ps
cycles
cycles
9
www.ti.com