LMK00308 Datasheet, PDF (3/25 Pages) Texas Instruments – 3-GHz 8-Output Differential Clock Buffer/Level Translator

6.0 Pin Descriptions
Pin #
DAP
1, 2
Pin Name(s)
DAP
CLKoutA0, CLKoutA0*
3, 6
4, 5
7, 8
9, 10
11, 39
V_CCOA
CLKoutA1, CLKoutA1*
CLKoutA2, CLKoutA2*
CLKoutA3, CLKoutA3*
CLKoutA_TYPE0,
CLKoutA_TYPE1
12, 35
Vcc
13
14
15, 18
16, 17
19, 32
20, 31, 40
21, 22
23, 24
25, 28
26, 27
29, 30
33, 34
36
37
OSCin
OSCout
CLKin_SEL0, CLKin_SEL1
CLKin0, CLKin0*
CLKoutB_TYPE0,
CLKoutB_TYPE1
GND
CLKoutB3*, CLKoutB3
CLKoutB2*, CLKoutB2
V_CCOB
CLKoutB1*, CLKoutB1
CLKoutB0*, CLKoutB0
CLKin1*, CLKin1
REFout
V_CCOC
38
REFout_EN
Type
GND
O
PWR
O
O
O
Description
Die Attach Pad. Connect to the PCB ground plane for heat dissipation.
Differential clock output A0. Output type set by CLKoutA_TYPE pins.
Power supply for Bank A Output buffers. V_CCOA can operate from 3.3 V or
2.5 V. The V_CCOA pins are internally tied together. Bypass with a 0.1 uF
low-ESR capacitor placed very close to each Vcco pin. (Note 1)
Differential clock output A1. Output type set by CLKoutA_TYPE pins.
Differential clock output A2. Output type set by CLKoutA_TYPE pins.
Differential clock output A3. Output type set by CLKoutA_TYPE pins.
I Bank A output buffer type selection pins (Note 2)
PWR
I
O
I
I
Power supply for Core and Input buffer blocks. The Vcc supply operates
from 3.3 V. Bypass with a 0.1 uF low-ESR capacitor placed very close to
each Vcc pin.
Input for crystal. Can also be driven by a XO, TCXO, or other external
single-ended clock.
Output for crystal. Leave OSCout floating if OSCin is driven by a single-
ended clock.
Clock input selection pins (Note 2)
Universal clock input 0 (differential/single-ended)
I Bank B output buffer type selection pins (Note 2)
GND
O
O
PWR
O
O
I
O
PWR
I
Ground
Differential clock output B3. Output type set by CLKoutB_TYPE pins.
Differential clock output B2. Output type set by CLKoutB_TYPE pins.
Power supply for Bank B Output buffers. V_CCOB can operate from 3.3 V or
2.5 V. The V_CCOB pins are internally tied together. Bypass with a 0.1 uF
low-ESR capacitor placed very close to each Vcco pin. (Note 1)
Differential clock output B1. Output type set by CLKoutB_TYPE pins.
Differential clock output B0. Output type set by CLKoutB_TYPE pins.
Universal clock input 1 (differential/single-ended)
LVCMOS reference output. Enable output by pulling REFout_EN pin high.
Power supply for REFout Output buffer. V_CCOC can operate from 3.3 V or
2.5 V. Bypass with a 0.1 uF low-ESR capacitor placed very close to each
Vcco pin. (Note 1)
REFout enable input. Enable signal is internally synchronized to selected
clock input. (Note 2)
Note 1: The output supply voltages/pins (V_CCOA, V_CCOB, and V_CCOC) will be referred to generally as V_CCO when no distinction is needed, or when the output supply
can be inferred by the output bank/type.
Note 2: CMOS control input with internal pull-down resistor.
Note 3: Any unused output pins should be left floating with minimum copper length (Note 5), or properly terminated if connected to a transmission line, or disabled/
Hi-Z if possible. See Section 7.3 Clock Outputs for output configuration or Section 14.3 Termination and Use of Clock Drivers output interface and termination
techniques.
3
www.ti.com