LMK00308 Datasheet, PDF (18/25 Pages) Texas Instruments – 3-GHz 8-Output Differential Clock Buffer/Level Translator

DC coupled example in Figure 10, since the voltage divider is
setting the input common mode voltage of the receiver.
30177622
FIGURE 10. Differential LVPECL Operation, DC Coupling,
Thevenin Equivalent
14.3.2 Termination for AC Coupled Differential Operation
AC coupling allows for shifting the DC bias level (common
mode voltage) when driving different receiver standards.
Since AC coupling prevents the driver from providing a DC
bias voltage at the receiver, it is important to ensure the re-
ceiver is biased to its ideal DC level.
When driving non-biased LVDS receivers with an LVDS driv-
er, the signal may be AC coupled by adding DC blocking
capacitors; however the proper DC bias point needs to be
established at the receiver. One way to do this is with the ter-
mination circuitry in Figure 11. When driving self-biased
LVDS receivers, the circuit shown in Figure 11 may be mod-
ified by replacing the 50 Ω terminations to Vbias with a single
100 Ω resistor across the input pins of the receiver. When
using AC coupling with LVDS outputs, there may be a startup
delay observed in the clock output due to capacitor charging.
The previous example uses a 0.1 μF capacitor, but this may
need to be adjusted to meet the startup requirements for the
particular application. Another variant of AC coupling to a self-
biased LVDS receiver is to move the 0.1 uF capacitors be-
tween the 100 Ω differential termination and the receiver
inputs.
30177624
FIGURE 12. Differential LVPECL Operation, AC Coupling,
Thevenin Equivalent
14.3.3 Termination for Single-Ended Operation
A balun can be used with either LVDS or LVPECL drivers to
convert the balanced, differential signal into an unbalanced,
single-ended signal.
It is possible to use an LVPECL driver as one or two separate
800 mV p-p signals. When DC coupling one of the LMK00308
LVPECL driver of a CLKoutX/CLKoutX* pair, be sure to prop-
erly terminate the unused driver. When DC coupling on of the
LMK00308 LVPECL drivers, the termination should be 50 Ω
to Vcco - 2 V as shown in Figure 13. The Thevenin equivalent
circuit is also a valid termination as shown in Figure 14 for
Vcco = 3.3 V.
30177625
FIGURE 13. Single-Ended LVPECL Operation, DC
Coupling
30177623
FIGURE 11. Differential LVDS Operation, AC Coupling,
No Biasing by the Receiver
LVPECL drivers require a DC path to ground. When AC cou-
pling an LVPECL signal use 160 Ω emitter resistors (or 91
Ω for Vcco = 2.5 V) close to the LVPECL driver to provide a
DC path to ground as shown in Figure 15. For proper receiver
operation, the signal should be biased to the DC bias level
(common mode voltage) specified by the receiver. The typical
DC bias voltage (common mode voltage) for LVPECL re-
ceivers is 2 V. Alternatively, a Thevenin equivalent circuit
forms a valid termination as shown in Figure 12 for Vcco = 3.3
V and 2.5 V. Note: this Thevenin circuit is different from the
30177626
FIGURE 14. Single-Ended LVPECL Operation, DC
Coupling, Thevenin Equivalent
When AC coupling an LVPECL driver use a 160 Ω emitter
resistor (or 91 Ω for Vcco = 2.5 V) to provide a DC path to
ground and ensure a 50 Ω termination with the proper DC bias
level for the receiver. The typical DC bias voltage for LVPECL
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