DS90CR286AT-Q1 Datasheet, PDF (8/29 Pages) Texas Instruments – Rising Edge Data Strobe LVDS Receiver 28-Bit Channel Link 66 MHz

DS90CR286AT-Q1
SNLS498A – NOVEMBER 2015 – REVISED DECEMBER 2015
Figure 4. Clock In to Clock Out Delay
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RxCLK IN
(Differential)
Figure 5. Phase Lock Loop Set Time
RxIN3
(Single-Ended)
RxOUT5-1 RxOUT27-1 RxOUT23
RxOUT17
RxOUT16
RxOUT11
RxOUT10
RxOUT5
RxOUT27
RxIN2
(Single-Ended)
RxOUT20-1 RxOUT19-1 RxOUT26
RxOUT25
RxOUT24
RxOUT22
RxOUT21
RxOUT20
RxOUT19
RxIN1
(Single-Ended)
RxOUT9-1 RxOUT8-1
RxOUT18
RxOUT15
RxOUT14
RxOUT13
RxOUT12
RxOUT9
RxOUT8
RxIN0
(Single-Ended)
RxOUT1-1 RxOUT0-1
RxOUT7
RxOUT6
RxOUT4
RxOUT3
RxOUT2
RxOUT1
RxOUT0
Figure 6. Mapping of 28 LVCMOS Parallel Data to 4D + C LVDS Serialized Data
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