DS90CR286AT-Q1 Datasheet, PDF (6/29 Pages) Texas Instruments – Rising Edge Data Strobe LVDS Receiver 28-Bit Channel Link 66 MHz

DS90CR286AT-Q1
SNLS498A – NOVEMBER 2015 – REVISED DECEMBER 2015
6.6 Switching Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
CLHT
LVCMOS Low-to-High Transition Time
(Figure 2)
CHLT
LVCMOS High-to-Low Transition Time
(Figure 2)
RSPos0
Receiver Input Strobe Position for Bit 0
(Figure 8)
RSPos1 Receiver Input Strobe Position for Bit 1
RSPos2
RSPos3
Receiver Input Strobe Position for Bit 2
Receiver Input Strobe Position for Bit 3
f = 40 MHz, T = 25ºC
RSPos4 Receiver Input Strobe Position for Bit 4
RSPos5 Receiver Input Strobe Position for Bit 5
RSPos6 Receiver Input Strobe Position for Bit 6
RSPos0
Receiver Input Strobe Position for Bit 0
(Figure 8)
RSPos1 Receiver Input Strobe Position for Bit 1
RSPos2
RSPos3
Receiver Input Strobe Position for Bit 2
Receiver Input Strobe Position for Bit 3
f = 66 MHz, T = -40ºC
RSPos4 Receiver Input Strobe Position for Bit 4
RSPos5 Receiver Input Strobe Position for Bit 5
RSPos6 Receiver Input Strobe Position for Bit 6
RSPos0
Receiver Input Strobe Position for Bit 0
(Figure 8)
RSPos1 Receiver Input Strobe Position for Bit 1
RSPos2
RSPos3
Receiver Input Strobe Position for Bit 2
Receiver Input Strobe Position for Bit 3
f = 66 MHz, T = 25ºC
RSPos4 Receiver Input Strobe Position for Bit 4
RSPos5 Receiver Input Strobe Position for Bit 5
RSPos6 Receiver Input Strobe Position for Bit 6
RSPos0
Receiver Input Strobe Position for Bit 0
(Figure 8)
RSPos1 Receiver Input Strobe Position for Bit 1
RSPos2
RSPos3
Receiver Input Strobe Position for Bit 2
Receiver Input Strobe Position for Bit 3
f = 66 MHz, T = 105ºC
RSPos4 Receiver Input Strobe Position for Bit 4
RSPos5 Receiver Input Strobe Position for Bit 5
RSPos6 Receiver Input Strobe Position for Bit 6
RCOP
RxCLK OUT Period (Figure 3)
RCOH
RxCLK OUT High Time (Figure 3)
RCOL
RSRC
RxCLK OUT Low Time (Figure 3)
RxOUT Setup to RxCLK OUT (Figure 3)
f = 40 MHz
RHRC
RxOUT Hold to RxCLK OUT (Figure 3)
RCOH
RxCLK OUT High Time (Figure 3)
RCOL
RSRC
RxCLK OUT Low Time (Figure 3)
RxOUT Setup to RxCLK OUT (Figure 3)
f = 66 MHz
RHRC
RxOUT Hold to RxCLK OUT (Figure 3)
www.ti.com
MIN
TYP
MAX
UNIT
2
5
ns
1.8
5
ns
1.01
1.4
2.45
ns
4.52
5.0
5.99
ns
8.08
8.5
9.35
ns
11.59
11.9
12.89
ns
15.15
15.6
16.53
ns
18.86
19.2
20.20
ns
22.34
22.9
23.91
ns
0.58
1.1
1.55
ns
2.77
3.3
3.80
ns
5.01
5.4
5.77
ns
7.11
7.5
7.88
ns
9.24
9.7
10.12
ns
11.44
11.9
12.32
ns
13.62
14.1
14.50
ns
0.68
1.2
1.64
ns
2.88
3.4
3.88
ns
5.08
5.5
5.87
ns
7.20
7.6
7.98
ns
9.30
9.7
10.24
ns
11.50
12.0
12.40
ns
13.70
14.2
14.57
ns
0.84
1.3
1.74
ns
3.00
3.6
4.05
ns
5.14
5.6
6.02
ns
7.30
7.8
8.14
ns
9.42
9.9
10.40
ns
11.59
12.1
12.57
ns
13.83
14.3
14.73
ns
15
50
ns
10.0
12.2
ns
10.0
11.0
ns
6.5
11.6
ns
6.0
11.6
ns
5.0
7.6
ns
5.0
6.3
ns
4.5
7.3
ns
4.0
6.3
ns
6
Submit Documentation Feedback
Product Folder Links: DS90CR286AT-Q1
Copyright © 2015, Texas Instruments Incorporated