OMAPL137CZKBT3 Datasheet, PDF (73/222 Pages) Texas Instruments – OMAP-L137 Low-Power Applications Processor

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OMAP-L137
SPRS563G – SEPTEMBER 2008 – REVISED JUNE 2014
EVT#
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Table 6-8. OMAP-L137 DSP Interrupts (continued)
INTERRUPT NAME
GPIO_B1INT
IIC1_INT
SPI1_INT
PRU_EVTOUT6
ECAP0
UART_INT1
ECAP1
T64P1_TINT34
GPIO_B2INT
PRU_EVTOUT7
ECAP2
GPIO_B3INT
EQEP1
GPIO_B4INT
EMIFA_INT
EDMA3_CC0_ERRINT
EDMA3_TC0_ERRINT
EDMA3_TC1_ERRINT
GPIO_B5INT
EMIFB_INT
MCASP_INT
GPIO_B6INT
RTC_IRQS
T64P0_TINT34
GPIO_B0INT
PRU_EVTOUT4
SYSCFG_CHIPINT3
EQEP0
UART2_INT
PSC0_ALLINT
PSC1_ALLINT
GPIO_B7INT
LCDC_INT
MPU_BOOTCFG_ERR
-
T64P0_CMPINT0
T64P0_CMPINT1
T64P0_CMPINT2
T64P0_CMPINT3
T64P0_CMPINT4
T64P0_CMPINT5
T64P0_CMPINT6
T64P0_CMPINT7
T64P1_CMPINT0
T64P1_CMPINT1
T64P1_CMPINT2
T64P1_CMPINT3
SOURCE
GPIO Bank 1 Interrupt
I2C1
SPI1
PRU Interrupt
ECAP0
UART1
ECAP1
Timer64P1 Interrupt 34
GPIO Bank 2 Interrupt
PRU Interrupt
ECAP2
GPIO Bank 3 Interrupt
EQEP1
GPIO Bank 4 Interrupt
EMIFA
EDMA3 Channel Controller 0
EDMA3 Transfer Controller 0
EDMA3 Transfer Controller 1
GPIO Bank 5 Interrupt
EMIFB Memory Error Interrupt
McASP0,1,2 Combined RX/TX Interrupts
GPIO Bank 6 Interrupt
RTC Combined
Timer64P0 Interrupt 34
GPIO Bank 0 Interrupt
PRU Interrupt
SYSCFG_CHIPSIG Register
EQEP0
UART2
PSC0
PSC1
GPIO Bank 7 Interrupt
LCD Controller
Shared MPU and SYSCFG Address/Protection Error Interrupt
Reserved
Timer64P0 - Compare 0
Timer64P0 - Compare 1
Timer64P0 - Compare 2
Timer64P0 - Compare 3
Timer64P0 - Compare 4
Timer64P0 - Compare 5
Timer64P0 - Compare 6
Timer64P0 - Compare 7
Timer64P1 - Compare 0
Timer64P1 - Compare 1
Timer64P1 - Compare 2
Timer64P1 - Compare 3
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Peripheral Information and Electrical Specifications
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