OMAPL137CZKBT3 Datasheet, PDF (143/222 Pages) Texas Instruments – OMAP-L137 Low-Power Applications Processor

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OMAP-L137
SPRS563G – SEPTEMBER 2008 – REVISED JUNE 2014
Table 6-71. Additional⁽¹⁾ SPI1 Slave Timings, 5-Pin Option^{(2) (3)} (continued)
No.
PARAMETER
MIN
Polarity = 0, Phase = 0,
from SPI1_CLK falling
30 t_{dis(SPC_ENA)S}
Delay from final clock receive edge
on SPI1_CLK to slave 3-stating or
driving high SPI1_ENA.⁽⁴⁾
Polarity = 0, Phase = 1,
from SPI1_CLK rising
Polarity = 1, Phase = 0,
from SPI1_CLK rising
Polarity = 1, Phase = 1,
from SPI1_CLK falling
MAX
UNIT
2.5 P + 19
2.5 P + 19
ns
2.5 P + 19
2.5 P + 19
(4) SPI1_ENA is driven low after the transmission completes if the SPIINT0.ENABLE_HIGHZ bit is programmed to 0. Otherwise it is 3-
stated. If 3-stated, an external pullup resistor should be used to provide a valid level to the master. This option is useful when tying
several SPI slave devices to a single master.
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Peripheral Information and Electrical Specifications 143
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