OMAPL137CZKBT3 Datasheet, PDF (202/222 Pages) Texas Instruments – OMAP-L137 Low-Power Applications Processor

OMAP-L137
SPRS563G – SEPTEMBER 2008 – REVISED JUNE 2014
www.ti.com
Table 6-111. Programmable Real-Time Unit Subsystem Interrupt Controller (PRUSS INTC)
Registers (continued)
BYTE ADDRESS
0x01C3 4080
0x01C3 4200
0x01C3 4204
0x01C3 4280
0x01C3 4284
0x01C3 4300
0x01C3 4304
0x01C3 4380
0x01C3 4384
0x01C3 4400 - 0x01C3 4440
0x01C3 4800 - 0x01C3 4808
0x01C3 4900 - 0x01C3 4928
0x01C3 4D00
0x01C3 4D04
0x01C3 4D80
0x01C3 4D84
0x01C3 5100 - 0x01C3 5128
0x01C3 5500
ACRONYM
GLBLPRIIDX
STATSETINT0
STATSETINT1
STATCLRINT0
STATCLRINT1
ENABLESET0
ENABLESET1
ENABLECLR0
ENABLECLR1
CHANMAP0 - CHANMAP15
HOSTMAP0 - HOSTMAP2
HOSTINTPRIIDX0 -
HOSTINTPRIIDX9
POLARITY0
POLARITY1
TYPE0
TYPE1
HOSTINTNSTLVL0-
HOSTINTNSTLVL9
HOSTINTEN
REGISTER DESCRIPTION
Global Prioritized Index Register
System Interrupt Status Raw/Set Register 0
System Interrupt Status Raw/Set Register 1
System Interrupt Status Enabled/Clear Register 0
System Interrupt Status Enabled/Clear Register 1
System Interrupt Enable Set Register 0
System Interrupt Enable Set Register 1
System Interrupt Enable Clear Register 0
System Interrupt Enable Clear Register 1
Channel Map Registers 0-15
Host Map Register 0-2
Host Interrupt Prioritized Index Registers 0-9
System Interrupt Polarity Register 0
System Interrupt Polarity Register 1
System Interrupt Type Register 0
System Interrupt Type Register 1
Host Interrupt Nesting Level Registers 0-9
Host Interrupt Enable Register
202 Peripheral Information and Electrical Specifications
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