MSP430F241X_11 Datasheet, PDF (73/107 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F241x, MSP430F261x
MIXED SIGNAL MICROCONTROLLER
SLAS541G -- JUNE 2007 -- REVISED MARCH 2011
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted) (continued)
12-bit DAC reference input specifications
Ve_REF+
PARAMETER
Reference input voltage
range
TEST CONDITIONS
DAC12IR = 0, (see Notes 1 and 2)
DAC12IR = 1, (see Notes 3 and 4)
V_CC
2.2 V/3 V
MIN
TYP
MAX UNIT
AV_CC/3 AV_CC+0.2
AVcc AVcc+0.2
V
DAC12_0 IR = DAC12_1 IR = 0
20
M
Ri_(VREF+),
Ri_(VeREF+)
Reference input
resistance
DAC12_0 IR = 1, DAC12_1 IR = 0
DAC12_0 IR = 0, DAC12_1 IR = 1
40
48
2.2 V/3 V
DAC12_0 IR = DAC12_1 IR = 1
DAC12_0 SREFx = DAC12_1 SREFx
20
24
(see Note 5)
56
k
28
NOTES:
1. For a full-scale output, the reference input voltage can be as high as 1/3 of the maximum output voltage swing (AV_CC).
2. The maximum voltage applied at reference input voltage terminal Ve_REF+ = [AV_CC -- V_E(O)] / [3*(1 + E_G)].
3. For a full-scale output, the reference input voltage can be as high as the maximum output voltage swing (AV_CC).
4. The maximum voltage applied at reference input voltage terminal Ve_REF+ = [AV_CC -- V_E(O)] / (1 + E_G).
5. When DAC12IR = 1 and DAC12SREFx = 0 or 1 for both channels, the reference input resistive dividers for each DAC are in parallel
reducing the reference input resistance.
12-bit DAC dynamic specifications, V_ref = V_CC, DAC12IR = 1 (see Figure 45 and Figure 46)
PARAMETER
TEST CONDITIONS
V_CC
MIN TYP
DAC12_xDAT = 800h, DAC12AMPx = 0  {2, 3, 4}
60
t_ON
DAC12 on-time
Error_V(O) < 0.5 LSB
(see Note 1 and
DAC12AMPx = 0  {5, 6}
2.2 V/3 V
15
Figure 45)
DAC12AMPx = 0  7
6
DAC12AMPx = 2
100
t_S(FS)
Settling time,
full scale
DAC12_xDAT =
80h F7Fh 80h
DAC12AMPx = 3, 5
2.2 V/3 V
40
DAC12AMPx = 4, 6, 7
15
t_S(C-C)
Settling time,
code to code
DAC12_xDAT =
3F8h 408h 3F8h
BF8h C08h BF8h
DAC12AMPx = 2
DAC12AMPx = 3, 5
DAC12AMPx = 4, 6, 7
2.2 V/3 V
5
2
1
SR
Slew rate
DAC12_xDAT =
80h F7Fh 80h
DAC12AMPx = 2
DAC12AMPx = 3, 5
DAC12AMPx = 4, 6, 7
0.05 0.12
2.2 V/3 V 0.35
0.7
1.5
2.7
DAC12AMPx = 2
600
Glitch energy,
full scale
DAC12_xDAT =
80h F7Fh 80h
DAC12AMPx = 3, 5
2.2 V/3 V
150
DAC12AMPx = 4, 6, 7
30
NOTES: 1. R_Load and C_Load are connected to AV_SS (not AV_CC/2) in Figure 45.
2. Slew rate applies to output voltage steps  200 mV.
MAX
120
30
12
200
80
30
UNIT
s
s
s
V/s
nV-s
DAC Output
ILoad ^{RLoad= 3 k}
AV _CC
2
RO/P(DAC12.x) ^{CLoad = 100pF}
VOUT
Conversion 1
Glitch
Energy
Conversion 2
+/-- 1/2 LSB
Conversion 3
+/-- 1/2 LSB
tsettleLH
Figure 45. Settling Time and Glitch Energy Testing
tsettleHL
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73