MSP430F241X_11 Datasheet, PDF (64/107 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F241x, MSP430F261x
MIXED SIGNAL MICROCONTROLLER
SLAS541G -- JUNE 2007 -- REVISED MARCH 2011
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
12-bit ADC built-in reference
PARAMETER
V_REF+
Positive built-in
reference voltage
output
AV_CC(min)
AV_CC minimum
voltage, positive
built-in reference
active
I_VREF+
Load current out of
V_REF+ terminal
TEST CONDITIONS
REF2_5V = 1 (2.5 V)
I_VREF+max  I_VREF+ I_VREF+min
REF2_5V = 0 (1.5 V)
I_VREF+max  I_VREF+ I_VREF+min
REF2_5V = 0,
I_VREF+max  I_VREF+ I_VREF+min
REF2_5V = 1,
--0.5mA  I_VREF+ I_VREF+min
REF2_5V = 1,
--1mA  I_VREF+ I_VREF+min
V_CC
3V
2.2 V/3 V
2.2 V/3 V
TA
--40C to 85C
105C
--40C to 85C
105C
MIN TYP
2.4 2.5
2.37 2.5
1.44 1.5
1.42 1.5
2.2
MAX
2.6
2.64
1.56
1.57
UNIT
V
2.8
V
2.2 V
3V
2.9
0.01
--0.5
0.01
--1 ^mA
I_L(VREF)+ ^†
Load-current
regulation, V_REF+
terminal
I_VREF+ = 500 A +/-- 100 A
Analog input voltage ~0.75 V,
REF2_5V = 0
I_VREF+ = 500 A  100 A
Analog input voltage ~1.25 V,
REF2_5V = 1
2.2 V
3V
3V
2
2
LSB
2
I_{DL(VREF) +‡}
C_VREF+
T_REF+†
Load current
regulation V_REF+
terminal
Capacitance at pin
V_REF+ (see Note 1)
Temperature
coefficient of
built-in reference
I_VREF+ = 100 A  900 A,
C_VREF+= 5 F, at ~0.5 V_REF+,
Error of conversion result  1 LSB
REFON =1,
0 mA  I_VREF+  I_VREF+max
I_VREF+ is a constant in the range
of 0 mA  I_VREF+  1 mA
3V
2.2 V/3 V
2.2 V/3 V
20 ns
5
10
F
100 ppm/C
t_REFON†
Settle time of
internal reference
voltage (see
Figure 38 and Note
2)
I_VREF+ = 0.5 mA, C_VREF+ = 10 F,
V_REF+ = 1.5 V, V_AVCC = 2.2 V
17 ms
† _{Limits characterized}
‡ _{Limits verified by design}
NOTES: 1. The internal buffer operational amplifier and the accuracy specifications require an external capacitor. All INL and DNL tests use
two capacitors between pins V_REF+ and AV_SS and V_REF--/V_eREF-- and AV_SS: 10 F tantalum and 100 nF ceramic.
2. The condition is that the error in a conversion started after t_REFON is less than 0.5 LSB. The settling time depends on the external
capacitive load.
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