MSP430FR6979 Datasheet, PDF (71/163 Pages) Texas Instruments – Mixed-Signal Microcontrollers

www.ti.com
MSP430FR6979, MSP430FR69791, MSP430FR6977
MSP430FR6928, MSP430FR6927, MSP430FR69271
SLAS797A – AUGUST 2014 – REVISED MARCH 2015
6.5 Bootstrap Loader (BSL)
The BSL enables programming of the FRAM or RAM using a UART serial interface (FRxxxx devices) or
an I²C interface (FRxxxx1 devices). Access to the device memory via the BSL is protected by an user-
defined password. Use of the BSL requires four pins as shown in Table 6-4. BSL entry requires a specific
entry sequence on the RST/NMI/SBWTDIO and TEST/SBWTCK pins. For complete description of the
features of the BSL and its implementation, see the MSP430 Memory Programming User's Guide
(SLAU265).
Table 6-4. BSL Pin Requirements and Functions
DEVICE SIGNAL
RST/NMI/SBWTDIO
TEST/SBWTCK
P2.0
P2.1
P1.6
P1.7
VCC
VSS
BSL FUNCTION
Entry sequence signal
Entry sequence signal
Devices with UART BSL (FRxxxx): Data transmit
Devices with UART BSL (FRxxxx): Data receive
Devices with I²C BSL (FRxxxx1): Data
Devices with I²C BSL (FRxxxx1): Clock
Power supply
Ground supply
6.6 JTAG Operation
6.6.1 JTAG Standard Interface
The MSP430 family supports the standard JTAG interface which requires four signals for sending and
receiving data. The JTAG signals are shared with general-purpose I/O. The TEST/SBWTCK pin is used to
enable the JTAG signals. In addition to these signals, the RST/NMI/SBWTDIO is required to interface with
MSP430 development tools and device programmers. The JTAG pin requirements are shown in
Table 6-5. For further details on interfacing to development tools and device programmers, see the
MSP430 Hardware Tools User's Guide (SLAU278).
Table 6-5. JTAG Pin Requirements and Functions
DEVICE SIGNAL
PJ.3/TCK
PJ.2/TMS
PJ.1/TDI/TCLK
PJ.0/TDO
TEST/SBWTCK
RST/NMI/SBWTDIO
VCC
VSS
DIRECTION
IN
IN
IN
OUT
IN
IN
FUNCTION
JTAG clock input
JTAG state control
JTAG data input, TCLK input
JTAG data output
Enable JTAG pins
External reset
Power supply
Ground supply
6.6.2 Spy-Bi-Wire Interface
In addition to the standard JTAG interface, the MSP430 family supports the 2-wire Spy-Bi-Wire interface.
Spy-Bi-Wire can be used to interface with MSP430 development tools and device programmers. The Spy-
Bi-Wire interface pin requirements are shown in Table 6-6. For further details on interfacing to
development tools and device programmers, see the MSP430 Hardware Tools User's Guide (SLAU278).
Copyright © 2014–2015, Texas Instruments Incorporated
Detailed Description
71
Submit Documentation Feedback
Product Folder Links: MSP430FR6979 MSP430FR69791 MSP430FR6977 MSP430FR6928 MSP430FR6927
MSP430FR69271