MSP430FR6979 Datasheet, PDF (123/163 Pages) Texas Instruments – Mixed-Signal Microcontrollers

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MSP430FR6979, MSP430FR69791, MSP430FR6977
MSP430FR6928, MSP430FR6927, MSP430FR69271
SLAS797A – AUGUST 2014 – REVISED MARCH 2015
SFR interrupt enable
SFR interrupt flag
SFR reset pin control
Table 6-44. Special Function Registers (Base Address: 0100h)
REGISTER DESCRIPTION
REGISTER
SFRIE1
00h
SFRIFG1
02h
SFRRPCR
04h
OFFSET
PMM Control 0
PMM interrupt flags
PM5 Control 0
Table 6-45. PMM Registers (Base Address: 0120h)
REGISTER DESCRIPTION
REGISTER
PMMCTL0
PMMIFG
PM5CTL0
OFFSET
00h
0Ah
10h
FRAM control 0
General control 0
General control 1
Table 6-46. FRAM Control Registers (Base Address: 0140h)
REGISTER DESCRIPTION
REGISTER
FRCTL0
00h
GCCTL0
04h
GCCTL1
06h
OFFSET
Table 6-47. CRC16 Registers (Base Address: 0150h)
REGISTER DESCRIPTION
CRC data input
CRC data input reverse byte
CRC initialization and result
CRC result reverse byte
REGISTER
CRC16DI
CRCDIRB
CRCINIRES
CRCRESR
OFFSET
00h
02h
04h
06h
Table 6-48. RAM Controller Registers (Base Address: 0158h)
REGISTER DESCRIPTION
RAM controller control register 0
REGISTER
RCCTL0
00h
OFFSET
Watchdog timer control
Table 6-49. Watchdog Registers (Base Address: 015Ch)
REGISTER DESCRIPTION
REGISTER
WDTCTL
OFFSET
00h
CS control 0
CS control 1
CS control 2
CS control 3
CS control 4
CS control 5
CS control 6
Table 6-50. CS Registers (Base Address: 0160h)
REGISTER DESCRIPTION
REGISTER
CSCTL0
CSCTL1
CSCTL2
CSCTL3
CSCTL4
CSCTL5
CSCTL6
OFFSET
00h
02h
04h
06h
08h
0Ah
0Ch
System control
JTAG mailbox control
Table 6-51. SYS Registers (Base Address: 0180h)
REGISTER DESCRIPTION
REGISTER
SYSCTL
SYSJMBC
OFFSET
00h
06h
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Product Folder Links: MSP430FR6979 MSP430FR69791 MSP430FR6977 MSP430FR6928 MSP430FR6927
MSP430FR69271