MSP430FR6979 Datasheet, PDF (143/163 Pages) Texas Instruments – Mixed-Signal Microcontrollers

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MSP430FR6979, MSP430FR69791, MSP430FR6977
MSP430FR6928, MSP430FR6927, MSP430FR69271
SLAS797A – AUGUST 2014 – REVISED MARCH 2015
Figure 7-5 shows the recommended decoupling circuit when an external voltage reference is used. The
internal reference module has a maximum drive current as specified in the Reference module's I_O(VREF+)
specification.
The reference voltage must be a stable voltage for accurate measurements. The capacitor values that are
selected in the general guidelines filter out the high- and low-frequency ripple before the reference voltage
enters the device. In this case, the 10-µF capacitor is used to buffer the reference pin and filter any low-
frequency ripple. A bypass capacitor of 4.7 µF is used to filter out any high frequency noise.
7.2.1.3 Detailed Design Procedure
For additional design information, see the application report Designing With the MSP430FR58xx, FR59xx,
FR68xx, and FR69xx ADC (SLAA624).
7.2.1.4 Layout Guidelines
Component that are shown in the partial schematic (see Figure 7-5) should be placed as close as possible
to the respective device pins. Avoid long traces, because they add additional parasitic capacitance,
inductance, and resistance on the signal.
Avoid routing analog input signals close to a high-frequency pin (for example, a high-frequency PWM),
because the high-frequency switching can be coupled into the analog signal.
If differential mode is used for the ADC12_B, the analog differential input signals must be routed closely
together to minimize the effect of noise on the resulting signal.
Copyright © 2014–2015, Texas Instruments Incorporated
Applications, Implementation, and Layout 143
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Product Folder Links: MSP430FR6979 MSP430FR69791 MSP430FR6977 MSP430FR6928 MSP430FR6927
MSP430FR69271