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MSP430FR6979 Datasheet, PDF (29/163 Pages) Texas Instruments – Mixed-Signal Microcontrollers
www.ti.com
MSP430FR6979, MSP430FR69791, MSP430FR6977
MSP430FR6928, MSP430FR6927, MSP430FR69271
SLAS797A – AUGUST 2014 – REVISED MARCH 2015
5.5 Typical Characteristics, Active Mode Supply Currents
3000
2500
2000
1500
I(AM,0%)
I(AM,50%)
I(AM,66%)
I(AM,75%)
I(AM,100%)
I(AM,RAMonly)
I(AM,75%)[uA] = 103*f[MHz] + 68
1000
500
0
0
1
2
3
4
5
6
7
8
MCLK Frequency [MHz]
I(AM, cache hit ratio): Program resides in FRAM. Data resides in SRAM. Average current dissipation varies with
cache hit-to-miss ratio as specified. Cache hit ratio represents number cache accesses divided by the total number of
FRAM accesses. For example, a 75% ratio implies three of every four accesses is from cache, and the remaining are
FRAM accesses.
I(AM, RAMonly): Program and data reside entirely in RAM. All execution is from RAM. FRAM is off.
Figure 5-1. Typical Active Mode Supply Currents, No Wait States
9
C001
5.6 Low-Power Mode (LPM0, LPM1) Supply Currents Into VCC Excluding External Current
over recommended operating free-air temperature (unless otherwise noted)(1) (2)
FREQUENCY (fSMCLK)
PARAMETER
VCC
1 MHz
4 MHz
8 MHz
12 MHz
16 MHz
UNIT
TYP MAX TYP MAX TYP MAX TYP MAX TYP MAX
ILPM0
2.2 V
75
105
165
250
230
µA
3.0 V
85
120
115
175
260
240
275
ILPM1
2.2 V
40
65
130
215
195
µA
3.0 V
40
65
65
130
215
195
220
(1) All inputs are tied to 0 V or to VCC. Outputs do not source or sink any current.
(2) Current for watchdog timer clocked by SMCLK included.
fACLK = 32768 Hz, fMCLK = 0 MHz, fSMCLK = fDCO at specified frequency, except for 12 MHz: here fDCO = 24 MHz and fSMCLK = fDCO/2.
Copyright © 2014–2015, Texas Instruments Incorporated
Specifications
29
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MSP430FR69271