DS90UB940-Q1 Datasheet, PDF (67/84 Pages) Texas Instruments – FPD-Link III to CSI-2 Deserializer

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9 Application and Implementation
DS90UB940-Q1
SNLS479A – NOVEMBER 2014 – REVISED JANUARY 2016
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The DS90UB940-Q1 is a FPD-Link III Deserializer which, in conjunction with the DS90UB949/947-Q1 Serializers,
converts 1-lane or 2-lane FPD-Link III streams into a MIPI CSI-2 interface. The Deserializer is capable of
operating over cost-effective 50Ω single-ended coaxial or 100Ω differential shielded twisted-pair (STP) cables. It
recovers the data from two FPD-Link III serial streams and translates it into a Camera Serial Interface (CSI-2)
format compatible with MIPI DPHY/CSI-2 supporting video resolutions up to WUXGA and 1080p60 with 24-bit
color depth.
9.2 Typical Applications
Bypass capacitors should be placed near the power supply pins. At a minimum, four (4) 10µF capacitors should
be used for local device bypassing. Ferrite beads are placed on the two sets of supply pins (VDD33 and VDDIO )
for effective noise suppression. The interface to the graphics source is LVDS. The VDDIO pins may be
connected to 3.3V or 1.8V. A capacitor and resistor are placed on the PDB pin to delay the enabling of the
device until power is stable. See Figure 36 for a typical STP connection diagram and for a typical coax
connection diagram.
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