SLAS191A Datasheet, PDF (63/86 Pages) Texas Instruments – Starter Kit Evaluation Kit Manual

4 Treatment of Interrupts
This chapter describes the special treatment of interrupts in the Monitor environment.
4.1 Use of Interrupts in the Monitor Environment
The interrupt structure of the MSP430 is fully supported by the terminal program with one exception, the NMI
interrupt has the same interrupt vector as the RESET interrupt.
There are no restrictions on the interrupt flags, but certain restrictions apply to the interrupt vectors. It is
impossible to program the interrupt vectors located in the address range FFECh to FFFEh, because they
are preprogrammed in the EPROM area and can not be modified. The Monitor Program has the flexibility
to allow a second set of interrupt vectors in the RAM address range 3E0h to 3FEh (5E0h–5FEh for the
MSP430X33x family) as shown in Figure 4–1. The Monitor Program branches program execution if an
interrupt occurs to the associated interrupt vector located in the second interrupt vector address range. The
instruction used is an absolute BR command (i.e., BR &0FFEAh for the ADC interrupt). Therefore, during
the use of the Monitor Program, the interrupt vectors are moved by an amount of FC00h below their normal
location.
Reset
NMI
P0.0 Interrupt
P0.1 Interrupt
Watchdog Interrupt
FFFEh
Interrupt
Reset
NMI
P0.0 Interrupt
P0.1 Interrupt
03FEh
ADC Interrupt
Watchdog Interrupt
Interrupt
Basic Timer Interrupt
Port0.2 to 0.7 Interrupt
FFE0h
ADC Interrupt
Basic Timer Interrupt
Port0.2 to 0.7 Interrupt
03E0h
Figure 4–1. Monitor Interrupts for the MSP430x32x Family
4–1