DS100BR111A_14 Datasheet, PDF (6/39 Pages) Texas Instruments – Ultra Low Power 10.3 Gbps 2-Channel Repeaters with Input Equalization and Output De-Emphasis

DS100BR111A
SNLS400C – JANUARY 2012 – REVISED APRIL 2013
Electrical Characteristics
Parameter
POWER SUPPLY CURRENT
IDD
Supply Current
LVCMOS DC SPECIFICATIONS
V_IH
Voltage Input High
V_IL
Voltage Input Low
V_OH
Voltage Output High
V_OL
Voltage Output Low
I_IN
Input Leakage Current
I_IN-P
Input Leakage Current
4-Level Input ⁽²⁾
LOS AND ENABLE / DISABLE TIMING
T_{LOS_OFF}
Input IDLE to Active
RX_LOS response time
T_{LOS_ON}
Input Active to IDLE
RX_LOS response time
T_OFF
TX Disable assert Time
TX_DIS = HIGH to Output OFF
T_ON
TX Disable negateTime
TX_DIS = LOW to Output ON
T_{LP_EXIT}
Auto Low Power Exit
ALP to Normal Operation
T_{LP_ENTER}
Auto Low Power Enter
Normal Operation to Auto Low
Power
CML RECEIVER INPUTS
V_TX
Source Transmit Launch Signal
Level
RL_RX-IN
RX return loss
Test Conditions
TX_DIS = LOW, EQ = ON
VOD_SEL = Float ( 1000 mV)
Auto Low Power Mode
TX_DIS = LOW, MODE = 20K
VID CHA and CHB = 0.0V
VOD_SEL = Float (1000 mV)
TX_DIS = HIGH (BR111A)
I_OH = -4.0 mA ⁽¹⁾
I_OL = 4.0 mA
Vinput = 0V or VDD
VDD_SEL = Float
Vinput = 0V or VIN
VDD_SEL = Low
Vinput = 0V or VDD - 0.05V
VDD_SEL = Float
Vinput = 0V or VIN - 0.05V
VDD_SEL = Low
See ⁽³⁾
See ⁽³⁾
See ⁽³⁾
See ⁽³⁾
See ⁽³⁾
See ⁽³⁾
Default power-up conditions
ENSMB = 0 or 1
SDD11 @ 4.1 GHz
SDD11 @ 11.1 GHz
SCD11 @ 11.1 GHz
Min
2.0
GND
2.0
-15
-15
-160
190
(1) Typical jitter reported is determined by jitter decomposition software on the DSA8200 Oscilloscope.
(2) Input is held to a maximum of 50 mV below VDD or VIN to simulate the use of a 1K resistor on the input.
(3) Parameter not tested in production.
Typ
50
12
25
0.035
0.4
0.005
0.150
150
100
800
-12
-8
-10
www.ti.com
Max Units
63
15
mA
35
VDD
V
0.7
V
V
0.4
V
+15
uA
-15
+80
uA
uS
uS
uS
uS
nS
uS
1600 mV
dB
6
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