DS100BR111A_14 Datasheet, PDF (14/39 Pages) Texas Instruments – Ultra Low Power 10.3 Gbps 2-Channel Repeaters with Input Equalization and Output De-Emphasis

DS100BR111A
SNLS400C – JANUARY 2012 – REVISED APRIL 2013
9. See information on VDD bypass below.
10. SDA and SCL pins connect pull-up resistor to VDD for 2.5V uC SMBus IO
11. SDA and SCL pins connect pull-up resistor to VDD for 3.3V uC SMBus IO
12. Any 4-Level input which requires a connection to "Logic 1" should use a 1K resistor to VIN
NOTE
The DAP (bottom solder pad) is the GND connection.
www.ti.com
Power Supply Bypass
Two approaches are recommended to ensure that the DS100BR111A is provided with an adequate power
supply. First, the supply (VDD) and ground (GND) pins should be connected to power planes routed on adjacent
layers of the printed circuit board. The layer thickness of the dielectric should be minimized so that the V_DD and
GND planes create a low inductance supply with distributed capacitance. Second, careful attention to supply
bypassing through the proper use of bypass capacitors is required. A 0.1 μF bypass capacitor should be
connected to each V_DD pin such that the capacitor is placed as close as possible to the device. Smaller body size
capacitors can help facilitate proper component placement.
System Management Bus (SMBus) and Configuration Registers
The System Management Bus interface is compatible to SMBus 2.0 physical layer specification. ENSMB must be
pulled high to enable SMBus mode and allow access to the configuration registers.
The DS100BR111A has AD[3:0] inputs in SMBus mode. These pins are the user set SMBus slave address
inputs. When pulled low the AD[3:0] = 0000'b, the device default address byte is B0'h. Based on the SMBus 2.0
specification, this configuration results in a 7-bit slave address of 1011000'b. The LSB is set to 0'b (for a WRITE),
thus the 8-bit value is 1011 0000'b or B0'h. The device address byte can be set with the use of the AD[3:0]
inputs.
Shown in the form of an expression:
Slave Address [7:4] = The DS100BR111A hardware address (1011'b) + Address pin AD[3]
Slave Address [3:1] = Address pins AD[2:0]
Slave Address [0] = 0'b for a WRITE or 1'b for a READ
Slave Address Examples:
• AD[3:0] = 0001'b, the device slave address byte is B2'h
– Slave Address [7:4] = 1011'b + 0'b = 1011'b or B'h
– Slave Address [3:1] = 001'b
– Slave Address [0] = 0'b for a WRITE
• AD[3:0] = 0010'b, the device slave address byte is B4'h
– Slave Address [7:4] = 1011'b + 0'b = 1011'b or B'h
– Slave Address [3:1] = 010'b
– Slave Address [0] = 0'b for a WRITE
• AD[3:0] = 0100'b, the device slave address byte is B8'h
– Slave Address [7:4] = 1011'b + 0'b = 1011'b or B'h
– Slave Address [3:1] = 100'b
– Slave Address [0] = 0'b for a WRITE
• AD[3:0] = 1000'b, the device slave address byte is C0'h
– Slave Address [7:4] = 1011'b + 1'b = 1100'b or C'h
– Slave Address [3:1] = 000'b
– Slave Address [0] = 0'b for a WRITE
TRANSFER OF DATA VIA THE SMBus
During normal operation the data on SDA must be stable during the time when SCL is High.
14
Submit Documentation Feedback
Copyright © 2012–2013, Texas Instruments Incorporated
Product Folder Links: DS100BR111A