AMC1210_14 Datasheet, PDF (6/54 Pages) Texas Instruments – Quad Digital Filter for 2nd-Order Delta-Sigma Modulator

AMC1210
SBAS372D – APRIL 2006 – REVISED MAY 2009.............................................................................................................................................................. www.ti.com
MODULATOR INPUT MODES
TIMING CHARACTERISTICS
Over recommended operating free-air temperature range at –40°C to +125°C, DVDD = +5V, CVDD = +5V, and BVDD = +2.7V, unless
otherwise noted.
PARAMETER
t_w1
Mode 0 clock period CLKx
t_w2
Mode 0 clock high time CLKx
t_su1
Setup time from data valid to CLKx high
t_h1
Hold time from CLKx high to data invalid
t_w3
Mode 1 clock period CLKx
t_w4
Mode 1 clock high time CLKx
t_su2
Setup time from data valid to CLKx high or low
t_h2
Hold time from CLKx high or low to data invalid
t_w5
Mode 2 data width INx
t_w6
Mode 2 data pulse width INx
t_w7
Mode 3 clock period CLKx
t_w8
Mode 3 clock high time CLKx
t_su3
Setup time from data valid to any CLKx high
t_h3
Hold time from any CLKx high to data invalid
t_w9
System clock period CLK
t_w10
System clock high time CLK
t_w11
Mode 3 generated clock period CLK_x
t_w12
Mode 3 generated high time CLKx
t_d1
Delay from system clock CLK high to generated CLKx high
t_d2
Delay from system clock CLK low to generated CLKx low
t_su4
Setup time from data valid to any CLKx high
t_h4
Hold time from any CLKx high to data invalid
MIN
45
10
5
5
90
20
5
5
45
22
22
5
5
5
11
3
t_w9
t_w10 – 2
0
0
5
5
MAX
1/64th of CLK period
t_w1 – 10
1/128th of CLK period
t_w3 – 10
1/32nd of CLK period
t_w7 – 5
10⁶
t_w9 – 3
t_w9 × MD control bits
t_w10 + 2
3
3
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Mode 0
CLKx
INx
t_w2
t_w1
t_su1
t_h1
Mode 1
CLKx
INx
t_w4
t_w3
t_su2
t_h2
t_su2
t_h2
Mode 2
(Manchester-encoded bit stream)
t_w5
Modulator internal clock
t_w6
Modulator internal data
1
1
0
1
1
0
0
1
1
INx
Mode 3 (CLKx is driven externally)
t_w7
t_w8
CLKx
t_su3
t_h3
INx
Mode 3 (CLKx is generated by AMC1210)
t_w9
CLK
t_d11
t_w11
t_w12
CLKx
t_su4
INx
t_w10
t_d2
t_h4
Figure 1. Modulator Input Mode Timing
6
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