AMC1210_14 Datasheet, PDF (22/54 Pages) Texas Instruments – Quad Digital Filter for 2nd-Order Delta-Sigma Modulator

AMC1210
SBAS372D – APRIL 2006 – REVISED MAY 2009.............................................................................................................................................................. www.ti.com
Equation 1 calculates the time it takes for the integrator to overflow:
t _OVERFLOW
+
(INT_MAX @ SOSR)
ǒ_{FILTOUT @} Ǔ _fINPUT
(1)
where:
• INT_MAX = the maximum integrator value (–2,147,483,648 if FILT_OUT< 0, 2,147,483,648 otherwise)
• FILT_OUT = Average Sinc filter output value (from –FILT_MAX to +FILT_MAX; see Table 10 )
• SOSR = oversampling ratio of the Sinc filter
• f_INPUT = modulator data rate
For example, if the sinc filter outputs an average code value of 100,000 at a rate of 39.06kHz (f_INPUT =
10.0MHz/SOSR = 256), it will take 549.8ms for an integrator overflow flag to occur.
When integrator overflow occurs, the integrator value is reset and integration continues.
16-Bit Data Shifting
If 16-bit data representation is chosen (DR is low), the shift control bits SH in the Integrator Parameter Register
control which 16-bit part of a 32-bit data word is sent to the register map. The shift control bits are the number of
left shifts in the 32-bit data word to achieve the maximum 16-bit value range. For example, if the sinc filter runs
with a Sinc³ structure and an oversampling ratio of 256, the data values will be in the range of –16,777,216 to
16,777,216. To get a maximum 16-bit range of –32,767 to 32,767, the shift control bits should be set to 9. In this
case, 9 LSBs of the 25-bit word are lost. The sign bit is not affected by the shift, which means the sign is always
correct, regardless of the shift control bits.
Table 12 shows an example. The first column shows the original 32-bit word, the second column shows the SH
bits value, and the last column shows which bits of the 32-bit word will be output in 16-bit mode.
Table 12. 16-Bit Representation Example
32-BIT WORD
b31–b0
SH VALUE
1
9
14
16-BIT
REPRESENTATION
b16–b1
b24–b9
b29–b14
Bypassing the Sinc Filter Unit
If the integrator is used without the sinc filter unit, the bit FEN has to be set high, the sinc filter structure has to be
set to Sinc¹, and the sinc filter OSR has to be set to '1'. In this case, the integrator will sum the direct input data
from the modulator.
Demodulation
Obtaining the resolver position from the AM-modulated resolver input signal requires mathematical demodulation.
This calculation is performed by the AMC1210 after phase calibration. Modulation is enabled by setting the DEN
bit in the Integrator Parameter Register high. For more information, see the Signal Generator Unit description
and the Applications Information.
Time Measure Unit
The time measure unit provides two modes of measuring times, depending on the TM bit in the Control
Parameter Register. A counter is implemented in the time measure unit that counts clock cycles from the
modulator clock input or the system clock.
The maximum measured time, t_MAX, is calculated with the formula shown in Equation 2. f_CLK is either the
modulator clock speed or the system clock speed.
t _MAX
+
65536
f_CLK
(2)
22
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