AMC1210_14 Datasheet, PDF (26/54 Pages) Texas Instruments – Quad Digital Filter for 2nd-Order Delta-Sigma Modulator

AMC1210
SBAS372D – APRIL 2006 – REVISED MAY 2009.............................................................................................................................................................. www.ti.com
HTL
(threshold register)
LTL
(threshold register)
INT
(pin 20)
CS
IN1
Parallel Mode 1
WR
RD
AD[7:0]
IFH1
(interrupt register)
IFL1
(interrupt register)
0x00
0xnnn1
0x00
0xnnn2
Figure 22. Interrupt Behavior
Acknowledge
The acknowledge pin ACK indicates that new data is available from one of the filter modules. When the
acknowledge pin goes high, new data is available in one or more of the Data Registers. By reading the Interrupt
Register, the filter module with new data can be determined. When one Data Register is read, the appropriate
acknowledge flag in the Interrupt Register will be reset; when all flags are reset, the acknowledge pin is reset to
low. The acknowledge pin can be inverted if the acknowledge polarity control bit (AP) in the Control Register is
set high. The acknowledge flags cannot be set if both the sinc filter and the integrator are disabled. Each
acknowledge flag can be disabled if the Acknowledge Enable control bit (AE) in the appropriate Sinc Filter
Parameter Register is set to low. The acknowledge flag is not set when the oversampling rates of the sinc filter
and the integrator are both set to '1'.
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