AMC1210_14 Datasheet, PDF (20/54 Pages) Texas Instruments – Quad Digital Filter for 2nd-Order Delta-Sigma Modulator

AMC1210
SBAS372D – APRIL 2006 – REVISED MAY 2009.............................................................................................................................................................. www.ti.com
100000000
10000000
1000000
3
Sinc
Sincfast
100000
10000
2
Sinc
1000
100
1
Sinc
10
1
1 21 41 61 81 101 121 141 161 181 201 221 241 261
Oversampling Ratio
Figure 16. Sinc Filter Resolution
The sinc filter has a bit width of 25 bits and a signed two's complementary data representation. The maximum
possible resolution gives a 26-bit word (±16,777,216). Note that this value is only reached if the delta-sigma
modulator is operated at absolute maximum positive or negative full-scale, which is beyond the recommended
full-scale range of 80% of most delta-sigma modulators. This value also does not represent the resolution of the
signal. The signal resolution is determined by the modulator, and increasing the filter bit width will not offer any
improved noise performance beyond the modulator capabilities.
Figure 17 shows how a typical application would use the digital filter. When the filter is enabled, it is continuously
processing data and generating output words. When an output word is ready to read, the processor is first
triggered by a rising edge on the ACK pin. Then the Interrupt Register is read to check which filter module
generated new data. Once all valid data registers have been read, the ACK pin goes low.
The data registers can be up to 32 bits.
INx
CLKx
ACK
DATA
REGISTER
I/O
Previous Value
DATA VALID
READ INTERRUPT REGISTER
READ DATA REGISTER
Figure 17. Typical Data Read Sequence
20
Submit Documentation Feedback
Product Folder Link(s): AMC1210
Copyright © 2006–2009, Texas Instruments Incorporated