TCM4300 Datasheet, PDF (57/69 Pages) Texas Instruments – Advanced RF Cellular Telephone Interface Circuit (ARCTIC )

ADDR
00h
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
Table 4–17. Microcontroller Register Definitions
NAME
CATEGORY
WBDCtrl
WBD
Wide-band data
FIFO
FIFO A(B) microcontroller to DSP (DSP to microcontroller)
MIntCtrl
Interrupt/control status
SynData0
SynData1
SynData2
SynData3
Synthesizer interface
SynCtrl0
SynCtrl1
SynCtrl2
MCClock
Microcontroller clock speed
RSSI A/D
RSSI level
BAT A/D
Battery level monitor
LCD D/A
LCD contrast control
MStatCtrl
Miscellaneous status/control
TXI Offset
TXQ Offset
Transmit dc offset compensation
R/W
W
R
W/(R)
R/W
W
W
W
W
W
W
W
W
R
R
W
R/W
W
W
4.16 Wide-Band Data/Control Register
This register is used for two functions, depending on whether it is being read from or written to. When read
from, the register provides the latest 8 bits of received and demodulated data according to the
microcontroller register map to the microcontroller. When it is written to, the bits are placed into the WBDCtrl
register (see Table 4–16) as shown here:
WBDCtrl
7
WBD_LCKD
W
6
WBD_ON
W
5–3
WBD_BW[2:0]
W
2–0
Reserved
When the WBDCtrl register is read, bit 7 (MSB) is the last received data bit.
The definition of the WBDCtrl register, according to the DSP register map, is shown in Table 4–18.
4–22