TCM4300 Datasheet, PDF (49/69 Pages) Texas Instruments – Advanced RF Cellular Telephone Interface Circuit (ARCTIC )

From DSP
38.88 MHz
MCLKIN
From
Micro-
controller
÷ 17, 18, 19, 20
2.048-MHz Codec Master Clock CMCLK
Adjust
Counter B
10
Adjust
Counter A
÷ 3, 4, 5
Analog/Digital
Mode (MODE bit)
5
=0
÷ 256
Bits 0 – 5
RCO _{8-kHz Codec Sample Clock CSCLK}
Phase-Adjusted
9.72-MHz Clock
÷ 243/
÷ 200
Analog/Digital
40.0/48.6-kHz A/ D Sample Clock (SINT)
Clock
Divider
Chain
Frequency Synth. Clock 303.75 kHz
WBD Demod. 6.48 MHz
ADC Clocks
DAC Clocks
÷N
N = (2, 3, . . . 32)
MCLKEN
Sync.
Enable
Logic
Microcontroller Clock MCCLK
External Clock Output MCLKOUT
Figure 4–6. Timing and Clock Generation for 38.88-MHz Clock
4–14