TCM4300 Datasheet, PDF (41/69 Pages) Texas Instruments – Advanced RF Cellular Telephone Interface Circuit (ARCTIC )

SQRC filtering. At the same time that the transmit outputs are beginning to ramp, the PAEN digital output
goes high. This output can enable the power amplifier of a cellular radio transmitter. The TCM4300 transmit
outputs reach the first π /4 DQPSK constellation value (maximum effect point, MEP) 6 SINT periods (3
symbol periods) after the start of the ramp.
The bit stream to be encoded as π /4 DQPSK symbols is generated by right shifts on each SINT of the TXI
register with bit 0 (LSB) used first.
Previously written data continues to propagate through the TCM4300 internal filters until the last π /4 DQPSK
constellation value (last MEP) occurs at the transmit outputs 15.5 SINT periods (318.9 µs) plus BST offset
delay after the last symbol occurs (2 SINT periods before TXGO goes low); then the transmit outputs decay
to zero differential voltage (each output at the voltage supplied to the VCM input terminal). The shape of the
decay is the transient resulting from the internal SQRC filtering. The transmit outputs are held at zero
differential voltage 6 SINT periods (3 symbol periods) after the start of the decay. At this time the PAEN digital
output is set low (see Figure 4–2 and Figure 4–3).
Nonzero values of the BST offset register increase the delays of both the transmit waveforms and PAEN
relative to the edges of TXGO after it is internally sampled by SINT. The delays are increased in increments
of 1/4 SINT (1/8 symbol period).
For delays of 1 SINT or greater, the fractional part of the delay can be achieved using the BST offset register
with the remaining integer SINT delay implemented externally by delaying the writing to TXGO and TXI.
The relative timing of PAEN and the transmit waveforms is not affected by the BST offset register.
The IS-54 standard describes shortened bursts and normal bursts. The two types differ in duration and
number of transmitted bursts, burst length being determined by the TXGO bit.
SINT
TXGO
TXI data bit
PAEN
TXI/Q output ramp
Input Bits
Dibit transmission
9.5 SINT Periods
d(T/8)^†
N+3 SINT Periods
(N = Total number of bits sent)
6 SINT Periods
19.5 SINT Periods +d(T/8)
15.5 SINT Periods +d(T/8)
>>>
>>>
>>>
>>>
First MEP
Last MEP
† _{Total delay = d (SINT/4 or T/8) where d = integer value (0,1,2,3) written to the BST offset register.}
Figure 4–2. Power Ramp-Up/Ramp-Down TIming Diagram
4–6