LM3S1H11 Datasheet, PDF (518/956 Pages) Texas Instruments – Stellaris® LM3S1H11 Microcontroller

External Peripheral Interface (EPI)
Register 17: EPI Status (EPISTAT), offset 0x060
This register indicates which non-blocking read register is currently active; it also indicates whether
the external interface is busy performing a write or non-blocking read (it cannot be performing a
blocking read, as the bus would be blocked and as a result, this register could not be accessed).
This register is useful to determining which non-blocking read register is active when both are loaded
with values and when implementing sequencing or sharing.
This register is also useful when canceling non-blocking reads, as it shows how many values were
read by the canceled side.
EPI Status (EPISTAT)
Base 0x400D.0000
Offset 0x060
Type RO, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
CELOW XFFULL XFEMPTY INITSEQ WBUSY NBRBUSY
reserved
ACTIVE
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:10
9
Name
reserved
CELOW
Type
RO
RO
Reset Description
0x0000.00 Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0
Clock Enable Low
This bit provides information on the clock status when in general-purpose
mode and the RDYEN bit is set.
Value Description
0 The external device is not gating the clock.
8
XFFULL
RO
0
External FIFO Full
This bit provides information on the XFIFO when in the FIFO sub-mode
of the Host Bus n mode with the XFFEN bit set in the EPIHBnCFG
register. The EPI0S26 signal reflects the status of this bit.
Value Description
0 The external device is not gating the clock.
1 The XFIFO is signaling as full (the FIFO full signal is high).
Attempts to write in this case are stalled until the XFIFO full
signal goes low or the counter times out as specified by the
MAXWAIT field.
518
January 23, 2012
Texas Instruments-Production Data