TLC320AC02C_15 Datasheet, PDF (50/86 Pages) Texas Instruments – Single-Supply Analog Interface Circuit

SCLK
2.4 V
FSD
0.8 V
SCLK Period/2
td(CH-FL)
FS
0.8 V
NOTE A: Timing shown is for the TLC320AC02 operating as the master or as a stand-alone device.
Figure 4 – 4. Master or Stand-Alone FS and FSD Timing
FS
0.8 V
td(FL-FDL)
FSD
0.8 V
NOTE A: Timing shown is for the TLC320AC02 operating in the slave mode (FS and SCLK signals are generated
externally). The programmed data value in the FSD register is 0.
Figure 4 – 5. Slave FS to FSD Timing
SCLK
2.4 V
0.8 V
td(CH-FDL)
FSD
0.8 V
NOTE A: Timing shown is for the TLC320AC02 operating in the slave mode (FS and SCLK signals are generated
externally). There is a data value in the FSD register greater than 18 (decimal).
Figure 4 – 6. Slave SCLK to FSD Timing
4–3