DS90UB949-Q1 Datasheet, PDF (50/82 Pages) Texas Instruments – 1080p HDMI to FPD-Link III Bridge Serializer

DS90UB949-Q1
SNLS452 – NOVEMBER 2014
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Register Maps (continued)
ADD
(dec)
32
ADD
(hex)
0x20
Register Name
Deserializer
Capabilities 1
Bit(s)
7
6
5
4
3
2
Table 10. Serial Control Bus Registers (continued)
Register
Type
RW
RW
RW
RW
RW
Default
(hex)
0x00
0x00
0x00
Function
Description
FREEZE_DES
_CAP
Port0/Port1
Freeze Deserializer Capabilities.
Prevent auto-loading of the Deserializer Capabilities by the Bidirectional Control Channel.
The Capabilities will be frozen at the values written in registers 0x20 and 0x21.
If PORT1_SEL is set, this register indicates Port1 capabilities.
HSCC_MODE[
0]
Port0/Port1
High-Speed Control Channel bit 0.
Lowest bit of the 3-bit HSCC indication. The other 2 bits are contained in Deserializer
Capabilities 2. This field is automatically configured by the Bidirectional Control Channel
once RX Lock has been detected. Software may overwrite this value, but must also set
the FREEZE DES CAP bit to prevent overwriting by the Bidirectional Control Channel.
If PORT1_SEL is set, this register indicates Port1 capabilities.
SEND_FREQ
Port0/Port1
Send Frequency Training Pattern.
Indicates the DS90UB949-Q1 should send the Frequency Training Pattern. This field is
automatically configured by the Bidirectional Control Channel once RX Lock has been
detected. Software may overwrite this value, but must also set the FREEZE DES CAP bit
to prevent overwriting by the Bidirectional Control Channel.
If PORT1_SEL is set, this register indicates Port1 capabilities.
SEND_EQ
Port0/Port1
Send Equalization Training Pattern.
Indicates the DS90UB949-Q1 should send the Equalization Training Pattern. This field is
automatically configured by the Bidirectional Control Channel once RX Lock has been
detected. Software may overwrite this value, but must also set the FREEZE DES CAP bit
to prevent overwriting by the Bidirectional Control Channel.
If PORT1_SEL is set, this register indicates Port1 capabilities.
DUAL_LINK_C
AP
Port0/Port1
Dual link Capabilities.
Indicates if the Deserializer is capable of dual link operation. This field is automatically
configured by the Bidirectional Control Channel once RX Lock has been detected.
Software may overwrite this value, but must also set the FREEZE DES CAP bit to
prevent overwriting by the Bidirectional Control Channel.
If PORT1_SEL is set, this register indicates Port1 capabilities.
DUAL_CHANN Dual Channel 0/1 Indication.
EL
In a dual-link capable device, indicates if this is the primary or secondary channel.
Port0/Port1 0: Primary channel (channel 0).
1: Secondary channel (channel 1).
This field is automatically configured by the Bidirectional Control Channel once RX Lock
has been detected. Software may overwrite this value, but must also set the FREEZE
DES CAP bit to prevent overwriting by the Bidirectional Control Channel.
If PORT1_SEL is set, this register indicates Port1 capabilities.
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