DS90UB949-Q1 Datasheet, PDF (40/82 Pages) Texas Instruments – 1080p HDMI to FPD-Link III Bridge Serializer

DS90UB949-Q1
SNLS452 – NOVEMBER 2014
www.ti.com
Register Maps (continued)
ADD
(dec)
7
ADD
(hex)
0x07
Register Name
Slave ID[0]
8
0x08 Slave Alias[0]
10
0x0A CRC Errors
11
0x0B
12
0x0C General Status
Bit(s)
7:1
0
7:1
0
7:0
7:0
7:5
4
3
2
1
0
Table 10. Serial Control Bus Registers (continued)
Register
Type
RW
RW
R
R
R
R
R
R
Default
(hex)
0x00
0x00
0x00
0x00
0x00
Function
Description
Slave ID 0
Port0/Port1
Slave Alias ID
0
Port0/Port1
CRC Error
LSB
Port0/Port1
CRC Error
MSB
Port0/Port1
Link Lost
Port0/Port1
BIST CRC
Error
Port0/Port1
TMDS Clock
Detect
DES Error
Port0/Port1
Link Detect
Port0/Port1
7-bit I2C address of the remote Slave 0 attached to the remote Deserializer. If an I2C
transaction is addressed to Slave Alias ID 0, the transaction will be remapped to this
address before passing the transaction across the Bidirectional Control Channel to the
Deserializer. A value of 0 in this field disables access to the remote Slave 0.
If PORT1_SEL is set, this register is with reference to Port1.
Reserved.
7-bit Slave Alias ID of the remote Slave 0 attached to the remote Deserializer. The
transaction will be remapped to the address specified in the Slave ID 0 register. A value
of 0 in this field disables access to the remote Slave 0.
If PORT1_SEL is set, this register is with reference to Port1.
Reserved.
Number of back channel CRC errors – 8 least significant bits. Cleared by 0x04[5].
If PORT1_SEL is set, this register is with reference to Port1.
Number of back channel CRC errors – 8 most significant bits. Cleared by 0x04[5].
If PORT1_SEL is set, this register is with reference to Port1.
Reserved.
Link lost flag for selected port:
This bit indicates that loss of link has been detected. This register bit will stay high until
cleared using the CRC Error Reset in register 0x04.
If PORT1_SEL is set, this register is with reference to Port1.
Back channel CRC error(s) during BIST communication with Deserializer. This bit is
cleared upon loss of link, restart of BIST, or assertion of CRC Error Reset bit in 0x04[5].
0: No CRC errors detected during BIST.
1: CRC error(s) detected during BIST.
If PORT1_SEL is set, this register is with reference to Port1.
Pixel clock status:
0: Valid clock not detected at HDMI input.
1: Valid clock detected at HDMI input.
CRC error(s) during normal communication with Deserializer. This bit is cleared upon
loss of link or assertion of 0x04[5].
0: No CRC errors detected.
1: CRC error(s) detected.
If PORT1_SEL is set, this register is with reference to Port1.
Link detect status:
0: Cable link not detected.
1: Cable link detected.
If PORT1_SEL is set, this register is with reference to Port1.
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